18 December 2001, 14:34:23 CST
Earlier Homework 2 grades were not recorded for some students, slightly affecting the averages and letter grades posted below. The problem has been fixed and the correct graph and averages have been posted.
18 December 2001, 9:51:30 CST
And now the moment you've all been waiting for! Step right up and click here. I hope to see most of you in EE 4720. Have a good holiday(s)!
17 December 2001, 20:04:40 CST
The grading is done, the data is in, and the spreadsheet has been set up. All that's left is to determine the letter grades and that's better done with a good night's sleep. Course grades will be posted tomorrow, probably before noon. Grades for the few graduating seniors in this class have already been posted to PAWS.
17 December 2001, 15:14:05 CST
Final Exam Grades Ready The average was 51.3, the range [0,96] (oooh). Prepare, prepare, and click here.
Course grades will be available later today or tomorrow. The next grading update will be tonight.
16 December 2001, 19:05:15 CST
Grading Update: Problems 1, 2, and 3 have been graded. Final exam grades should be available tomorrow, course grades on Tuesday, possibly earlier. The next grading update will be posted by tomorrow evening.
15 December 2001, 15:39:58 CST
Linked the Final Exam to the assignments and exams page.
Grades may be available Monday or Tuesday, possibly earlier. A grading update will be posted right here in this what's new list by tomorrow evening.
11 December 2001, 16:23:33 CST
Linked solution to practice final to the assignments and exams page.
9 December 2001, 13:58:17 CST
Changed instruction xxx in the practice final exam. Line "wb_rd = rt" changed to "wb_rd = 25"
Linked solution to Homework 7 to the assignments and exams page.
Posted solution to practice final exam problem 2 and problem 3. A complete solution will be posted Monday or possibly later (but before the final.).
8 December 2001, 13:15:19 CST
Linked final exam review to the lectures page. A solution to the practice final should be completed by Monday, maybe earlier. I wouldn't rule out later either, but if so not too much later than Monday.
7 December 2001, 9:06:49 CST
Grades for Homeworks 3, 5, and 6 E-mailed.
5 December 2001, 18:39:46 CST
Finished Set 13, MIPS Implementations. This provides some details and background on the MIPS implementations covered in class.
5 December 2001, 16:34:26 CST
What are they reading? Find out! (See the new "What's Popular" link on the course home page.)
5 December 2001, 15:11:31 CST
Fixed a problem that resulted in long load times for solutions to Homework 7. If you were using Modelsim while the change was made (7 December, 15:10) you'll have to re-start Modelsim and re-compile your design. If you made your own copy of hw07sup.v (which there was no need to do) you'll need to get another copy. The change should not affect whether a solution works or not.
4 December 2001, 17:55:47 CST
Posted a practice final exam. The actual final exam may not be as long. Don't skip Problem 3.
Posted a Homework 5 solution and a Homework 6 solution. All of these are linked to the assignments and exams page.
3 December 2001, 15:31:32 CST
Deadline for Homework 7 extended to midnight, the night of Wednesday, 5 December.
Posted todays version of the hardwired control mips and the completed (non-class) version of the hardwired control mips. Also posted the microcoded control mips, which will be presented in class on Wednesday.
30 November 2001, 15:16:20 CST
Posted today's hardwired control mips implementation, a required memory module and a testbench. At some point Set 13 will include more information about them.
28 November 2001, 18:31:00 CST
Homework 7 assigned; as discussed in class, due Monday, 3 December 2001 :-). The cpu module in the homework assignment is what the cpu presented in class today will become. The most interesting change is how the connections to memory are handled (in the first always block). This should be figureoutable at this point, nevertheless it will be covered in class.
27 November 2001, 13:36:22 CST
For Homework 6 assume that any values can be used for rs and rd in the jalr instruction. According to the MIPS documentation certain values are illegal, including the ones used in the first jalr in the solution test code. These values are legal here and if not handled properly introduce a problem that the sharp-eyed will have the satisfaction of anticipating and others will have the satisfaction of tracking down. (The values are forbidden so that the jalr can be easily re-executed when the instruction in the delay slot raises an exception. Exceptions will be covered in EE 4720.).
Thank you to those students who pointed out that the first jalr in testbench uses an illegal register combination.
20 November 2001, 8:23:50 CST
Updated class strawman MIPS implementation and linked earlier versions to the lectures page.
19 November 2001, 17:54:13 CST
Linked solution to Homework 4 to the assignments and exams page.
19 November 2001, 9:49:11 CST
Homework 2 grades E-mailed to class accounts (yes, finally).
16 November 2001, 15:13:07 CST
Linked today's version of the strawman MIPS to the lectures page.
15 November 2001, 15:20:16 CST
Homework 5 (due Monday, 19 November) and (yes, and) Homework 6 (due Tuesday, 27 November) assigned.
14 November 2001, 16:58:23 CST
Linked an under-construction version of Set 13, MIPS Implementation(s) to the lectures page. The file includes links to the MIPS implementation being written in class and to the completed implementation. (Note: completed isn't a guarantee that it won't be updated.)
13 November 2001, 14:12:14 CST
Linked Set 12, Load and Store Instructions, to the lectures page.
13 November 2001, 10:28:45 CST
Added a question on combining certain bits from one register with another to the FAQ page.
12 November 2001, 19:18:22 CST
Due date for Homework 4 extended to Tuesday, midnight.
11 November 2001, 13:40:00 CST
SPIM now is now less indulgent of assembly language errors. In particular, immediates must be in the correct range and can only be used with immediate instructions. For example, the first two "instructions" below were okay before but would be rejected now; they are followed by acceptable instructions.
# Two "instructions" below no longer accepted. add $t0, $t1, 2 addi $t2, $t2, 0x123456 # Use these instructions instead. addi $t0, $t1, 2 lui $t2, 0x12 ori $t2, $t2, 0x3456
9 November 2001, 17:42:08 CST
The lui problem described below has been fixed.
9 November 2001, 17:14:42 CST
Some students have identified a problem with SPIM. It rejects the immediate below as being out of range:
lui $t0, 0x8000For now, write the immediate as a signed number, in the case above:
lui $t0, -32768The problem might be fixed soon, check the course home page. [The problem has been fixed, see entry above.]
7 November 2001, 17:52:10 CST
Linked Set 10, Control-Transfer Instructions, and Set 11, Object Files and System Calls.
6 November 2001, 14:11:53 CST
Added questions on SPIM (the MIPS simulator) to the FAQ page.
6 November 2001, 11:15:23 CST
Homework 4 assigned, due Monday, 12 November 2001.
Linked MIPS and SPIM (a MIPS simulator) documentation to the references page.
2 November 2001, 9:54:37 CST
Linked Set 9, MIPS Basics, to the lectures page.
31 October 2001, 11:04:21 CST
Linked Midterm Exam, its solution, and and related Verilog code to the assignments and exams page.
31 October 2001, 10:26:33 CST
The average is 56.7, the range is [7,91]. Steady your hand and click here.
31 October 2001, 8:19:52 CST
Grading Update: Midterm exam grades will be available today, possibly in time for today's class.
26 October 2001, 17:55:38 CDT
Linked a solution to the practice midterm to the assignments and exams page. There is also solution Verilog code.
26 October 2001, 15:43:36 CDT
Posted a corrected solution to Homework 2; the change affects the "Condition C4" box, on the right of the diagram.
Posted a slightly enhanced version of the midterm exam topics presented in class.
Coming today: a solution to the practice exam. Check back in case other study material is posted.
25 October 2001, 18:05:29 CDT
Linked solution to Homework 3 to the assignments and exams page. The solution includes text and Verilog material.
24 October 2001, 17:48:42 CDT
Added a solution to problem 3 in the Homework 2 solution, linked to the assignments and exams page.
24 October 2001, 16:23:06 CDT
Added a question on forwarding class account E-mail to the FAQ page.
22 October 2001, 18:20:07 CDT
Linked Practice Midterm Exam to the assignments and exams page. Note that the practice midterm is longer than an actual 50-minute midterm.
22 October 2001, 10:08:09 CDT
Linked Solution to Homework 2 to the assignments and exams page.
19 October 2001, 17:31:42 CDT
Homework 1 graded. Check your class account E-mail.
19 October 2001, 16:20:58 CDT
Linked Homework 3 to the assignments and exams page. This assignment will not be collected, it's just for practice.
19 October 2001, 9:15:08 CDT
Reminder: Midterm exam will be on Monday, 29 October. There will be a review on the Friday before.
17 October 2001, 10:27:53 CDT
Updated Set 8, Floating Point, linked to the lectures page.
10 October 2001, 14:31:12 CDT
Homework 2 due date changed to Tuesday, 16 October a few minutes after midnight (which would really make it Wednesday morning, but pretend it's Tuesday night).
10 October 2001, 11:44:59 CDT
Updated Set 7, Integer Multiplication and Division. Linked an under-construction version of Set 8, Floating Point to the lectures page.
3 October 2001, 12:01:43 CDT
Linked Homework 2 to the assignments and exams page, due 15 October 2001.
Linked solution to Homework 1 to the assignments and exams page.
Linked an under-construction version of Set 7, Integer Multiplication and Division to the lectures page.
27 September 2001, 18:59:59 CDT
Posted an almost-complete version of Set 6, Procedural Code and Behavioral Modeling.
24 September 2001, 11:56:14 CDT
Posted an under-construction version of Set 6, Procedural Code and Behavioral Modeling.
Reminder, homework will be copied tonight.
18 September 2001, 16:53:11 CDT
Completed most of material in Set 5, Addition and Subtraction.
17 September 2001, 12:13:54 CDT
Linked under-construction version of Set 5, Addition and Subtraction, to lectures page.
17 September 2001, 10:56:09 CDT
Linked Homework 1 to assignments and exams page. Due Monday, 24 September 2001.
16 September 2001, 16:30:40 CDT
Added link to procedures on course home page. The procedures page contains instructions on using the simulator and other software.
15 September 2001, 16:41:55 CDT
Added link to references on course home page. The references page includes links to simulator, synthesis, Verilog, and Unix documentation.
14 September 2001, 8:20:49 CDT
Class start delayed by about 20 minutes for the memorial service at Memorial Tower.
12 September 2001, 11:45:36 CDT
Linked Verilog notes set 4 (Synthesis, under construction) to the lectures page.
30 August 2001, 14:10:56 CDT
Linked Verilog notes set 2 (Expressions) and Verilog notes set 3 (Delay) to the lectures page.
29 August 2001, 17:13:10 CDT
Added question about a course packet for this course to the FAQ page. (There is no packet for this course; the packet being sold is for the previous semester.)
29 August 2001, 9:50:53 CDT
Linked lecture slides set 1 and Verilog notes set 1 to the lectures page.
21 August 2001, 15:49:19 CDT
Updated first set of lecture slides, Set 0, which is linked to the lectures page.
20 August 2001, 15:32:43 CDT
Linked preliminary version of first set of lecture slides, Set 0, to lectures page.
17 August 2001, 12:23:05 CDT
Set up Web pages for course.
|David M. Koppelman - email@example.com||Modified 21 Dec 2001 11:33 (1733 UTC)|