References for material covered in lectures and needed to complete the assignments. Passwords are required for outside (of lsu.edu) access to certain material (due to copyright restrictions). The user name is ee3755, the password can be obtained by authorized users (LSU students, faculty, and staff) from David M. Koppelman.
Unix is a Four Letter Word... and Vi is a Two Letter Abbreviation, by Christopher C. Taylor. (4.10 kB html)
A 48-page (in PDF form) introduction to Unix. Reasonably concise. Available in HTML, PostScript, and PDF.
Cadence Verilog-XL Reference, Product Version 10.2, September 2011 (3.50 MB PDF)
Reference manual for the extended version of Verilog, VerilogXL, used by Cadence packages. The manual describes the VerilogXL language itself as well as a simulator. Password needed if accessed from off campus. (UserID is ee3755)
Qualis Design Corporation Verilog HDL Quick Reference Card Revision 1.0 (18.1 kB PDF)
Two-page, triptych-foldable, quick reference guide for Verilog. (Company promotion.) Recommended.
"Handbook on Verilog HDL," by Daniel C. Hyde, Computer Science Department, Bucknell University.
A 32-page (PDF) guide to Verilog used at Bucknell University and widely cited. Useful if you didn't buy the book or if you need the material described differently.
Standard 1364-1995 IEEE Standard Hardware Description Language Based on the Verilog Hardware Description Language, 1995
The canonical reference for Verilog is IEEE standard 1364-1995. It is reasonably readable and is more concise and complete than the textbook. It can be purchased for $147 ($118 for members) from the IEEE Store. It is also available for free, sort of. There is a version on the net at IEEE Verilog HDL Language Reference Manual Project, but its not intended for public use. A pre-IEEE-standard copy is included with the Silos III Demo simulator distribution in ...\silos3\Help\VERILOG.HLP. (The Silos demo simulator is on the second CD-ROM in the back of the Ciletti text.)
Cadence HDL Modeling in Encounter RTL Compiler, Product Version 10.1, August 2011 (1.42 MB PDF)
Description of the synthesis capabilities and limits of the Cadence Encounter RTL Compiler. Password needed if accessed from off campus. (UserID is ee3755)
James R. Larus, SPIM S20: A MIPS R2000 Simulator (138 kB PDF)
Documentation for the SPIM simulator. Additional documentation can be found in Appendix A of Patterson & Hennessy.
MIPS Technologies, MIPS32 Architecture for Programmers Volume I: Introduction to the MIPS32 Architecture. (948 kB PDF)
Volume 1 of 3. Provides an overview of the MIPS32 ISAs.
MIPS Technologies, MIPS32 Architecture for Programmers Volume II: The MIPS32 Instruction Set (2.29 MB PDF)
Volume 2 of 3. A complete list of MIPS32 instructions. (SPIM uses a subset of these.)
MIPS Technologies, MIPS32 Architecture for Programmers Volume III: The MIPS32 Privileged Resource Architecture (1.08 MB PDF)
Volume 3 of 3. A description of system-related architecture features. Not needed for EE 3755.
David M. Koppelman - koppel@ece.lsu.edu | Modified 18 Oct 2012 18:38 (2338 UTC) |