EE 4720 - What's New

17 May 2003, 14:52:28 CDT
Linked final exam solution to the previous work page.

16 May 2003, 9:04:28 CDT
COURSE GRADES READY! No one flunked! That's not good enough for everyone, to find out more click here.

The solution will probably be posted today. There was one question that no one answered correctly. Problem 5a asked about the suitability of candidate instructions for an extended version of MIPS. One candidate was an improvement to sllv in which the instruction would shift right if the rt register held a negative value. Currently, the instruction only looks at the low five bits and only shifts left. Almost everyone answered that it would be a big improvement because of the reduction in the number of instructions. That aspect is good, the problem is that sllv might be used with a negative rt value in existing MIPS programs. Those programs would not run correctly on an implementation with the improved instruction. An ISA extension should run old code correctly and so that change to sllv should not be made. Instead a new instruction could be added, say sblv (shift bidirectional logical variable).

An announcement for the Computer Architecture II (listed as Multiprocessors...) course will be posted here, this week or next.

Good luck on your remaining finals and enjoy your summer!!

15 May 2003, 16:44:51 CDT
Final exam grades ready! The grades range from 93 to 24. Get ready and click here.
Course grades will be posted tomorrow.

15 May 2003, 11:52:42 CDT
Grading Update #1
Problem 1 graded, Problem 2 partly graded. Most did well on Problem 1. The grades should be ready this afternoon or early evening, depending on the penmanship and perspicuousness of the answers.

If you are an undergraduate student not completely put off by the course and would like a student worker job doing computer architecture research please contact me. (The pay will be much less than half of 2²⁵.)

14 May 2003, 17:32:33 CDT
Replaced the joke final exam with the real thing. Exam should be graded by tomorrow late afternoon, course grades will probably be available on Friday. A grading update will be posted tomorrow around noon. Good luck on your other exams, or if you're done enjoy watching The Matrix Reloaded.

9 May 2003, 18:28:24 CDT
Posted a dynamic scheduling study guide. This provides a summary of Method 3 and lists some dynamic scheduling problems.

9 May 2003, 15:40:06 CDT
A study guide for dynamic scheduling will be posted here later today, perhaps in an hour. Check back daily for any additional study resources that might be posted.

9 May 2003, 12:53:20 CDT
Linked final exam review to the lectures page.

9 May 2003, 10:17:08 CDT
Solution to Homework 6 modified. In Problem 2 the registers freed by the instructions committing in cycles 10 and 12 were omitted. The posted solution is now correct. The modified portion is shown below. (Only the lines for physical registers 92 and 96 changed.)

 # Cycle          0  1  2  3  4  5  6  7  8  9  10 11 12 13 14 15
 Physical Register File
 99       112 ]      [                          100]
 98       583 ]         [                          106   ]
 97       174 ]            [                          104   ]
 96       309                                   ]
 95       606 ]               [        0                       ]
 94       058 ]                  [        700
 93       285 ]                     [        6fc
 92      1234                                         ]
 91       518 ]
 90       207 ]
 # Cycle          0  1  2  3  4  5  6  7  8  9  10 11 12 13 14 15

7 May 2003, 11:44:41 CDT
Linked the midterm exam solution to the previous work page.

7 May 2003, 11:23:27 CDT
Linked solution to Homework 6 to the previous work page. The midterm exam solution will be posted this week.

7 May 2003, 10:49:10 CDT
Linked Set 13, Memory and Caches, to the lectures page.

6 May 2003, 18:10:34 CDT
Linked solution to Homework 5 to the previous work page. Other solutions will be posted this week.

6 May 2003, 15:26:46 CDT
Linked solution to Homework 4 to the previous work page. Other solutions will be posted this week.

28 April 2003, 13:20:05 CDT
Linked Set 12, Branch and Jump Prediction, to the lectures page.

22 April 2003, 9:31:20 CDT
Linked Set 11, Superscalar and VLIW, and Set 10, Dynamic Scheduling, to the lectures page.

21 April 2003, 15:09:12 CDT
Homework 6 assigned. Due Friday, 25 April 2003.

2 April 2003, 9:52:02 CST
For Homework 4, try looking at Spring 2002 Homework 3.

31 March 2003, 14:54:21 CST
Homework 4 now due Wednesday, 2 April 2003. For Problem 2 when answering the part about quad-precision instructions think about the way the instructions are coded. In Problem 4, consider injecting new instructions which are similar to existing ISA instructions. Try to add as few new instructions as possible.

26 March 2003, 16:35:17 CST
Homework 4 and Homework 5 assigned. Due Monday, 31 March 2003 and Friday, 4 April 2003, respectively. In case anyone gets discouraged, Homework 5 is easier than Homework 4.

26 March 2003, 13:21:17 CST
Linked Set 9, Long Latency Operations (Floating Point) to the lectures page.

23 March 2003, 16:04:51 CST
Grading is complete. The average grade is 57.8, the range is [30,80]. The total weight for Problem 2 has been reduced from 30 to 20 points and the weight for Problem 1 has been increased from 30 to 34.3 and the weight for Problem 3 has been increased from 40 to 45.7. When you're ready, click here.

22 March 2003, 15:11:37 CST
Problem 2 graded, didn't realize it would be that hard. To better reflect people's answers, it was re-weighted: part a (re-write the program) is now 16 points (was 10 points) and part c and d (the more restrictive CISC-B ISA) is now 4 points (was 10 points). The thing that most people missed was that each operand would need an operand type field, specifying whether the operand were an immediate, register, or memory. For immediates the type also specifies the size, for memory it specifies the addressing mode. The type field would not be needed in CISC B.

The exam should be graded by tomorrow afternoon, possibly later. The next grading update will be tomorrow at noon or later.

22 March 2003, 13:25:49 CST
Problem 1 graded. The next grading update will be posted later this afternoon.

21 March 2003, 17:50:07 CST
Grading Update: No problems graded yet. In Problem 1 I intended that the branch should be taken, but there is nothing in the problem (in the version given in class) that rules out the possibility that it's not taken. A taken branch makes the solution more interesting. The posted exam states that the branch is taken. Of course, full credit will be given for a correct solution with a taken or a not-taken assumption.

The next grading update will be tomorrow about noon.

21 March 2003, 15:01:19 CST
Linked Midterm Exam to previous work page.

The test might be graded by Monday. A grading update will be posted by late this afternoon, for those who can tear themselves away from other Web sites.

20 March 2003, 13:35:43 CST
The Homework 3 solution has been linked to the previous work page.

20 March 2003, 8:25:17 CST
Late submissions of Homework 3 due at 12:00 today. Submissions after that will get zero credit. This hard deadline is necessary so that a solution can be posted before the exam.

19 March 2003, 12:41:29 CST
Linked Midterm Exam Review and Set 8, Interrupts, Exceptions, and Traps, to the lectures page.

18 March 2003, 15:28:35 CST
In the hint for Homework 3, Problem 3, ignore the part about the bypass path. (It has been removed from the posted version.)

18 March 2003, 10:44:02 CST
Linked Homework 2 solution to the previous work page. Look at the comments on lui-like instructions in the discussion of common mistakes.

18 March 2003, 9:54:19 CST
Updated Statically Scheduled MIPS Study Guide.

17 March 2003, 19:14:51 CST
Posted a draft Statically Scheduled MIPS Study Guide. The guide lists problems to study. It is in draft form, the problems are listed but with little explanation. An improved version will be posted tomorrow.

17 March 2003, 17:49:13 CST
Midterm grades posted to PAWS. These grades were computed using the higher homework grade. The B range was intentionally made very large so as not to lull too many people into complacency with a high grade and to not discourage too many people with a low grade.

17 March 2003, 16:00:24 CST
Put the following corrected Problem 3 illustration in Homework 3: Revised Problem 3 Illustration

. Also added this text to Problem 4:

To solve this problem first find instructions that set and use the multiple FCC registers in the SPARC V9 Architecture Manual. Then write a program that needs the result of one comparison (say, a<b) several times while also using the result of another (say, c>d). A program not using multiple condition code registers should have to do the comparison multiple times whereas the program you write does each comparison once.)

12 March 2003, 16:03:11 CST
Midterm Exam date set. The midterm exam will be on Friday, 21 March 2003. There will be a review on Wednesday and additional study materials may be posted. A good way to get ready for the exam is to complete homework 3 now. Do not leave it for after the exam, even if an extension is given.

12 March 2003, 13:33:14 CST
Assigned Homework 3, due Wednesday, 19 March 2003.

28 February 2003, 15:05:29 CST
Linked Set 6, Unpipelined and Pipelined DLX and MIPS implementations to the lectures page.

26 February 2003, 16:25:24 CST
Assigned Homework 2, due Friday, 7 March 2003.

19 February 2003, 13:36:21 CST
Linked Set 4, Control Transfer and Other Instructions, to the lectures page.

17 February 2003, 13:25:18 CST
Linked Set 3, Instruction Set Design, to the lectures page.

12 February 2003, 15:33:42 CST
Linked a Homework 1 Solution and a complete program for Problem 4. Also added material to the RISC ISAs set.

10 February 2003, 15:27:01 CST
Linked ISA Family Overview (includes comparison of MIPS, DLX, and SPARC) to the lectures page.

3 February 2003, 18:43:14 CST
Homework 1 assigned, due Monday, 10 February 2003.

Linked MIPS Overview class notes to lectures page.

31 January 2003, 16:39:58 CST
Linked Optimization Notes to the lectures page.

23 January 2003, 11:12:54 CST
On references page, updated Itanium (IA-64) and added links for PA-RISC and VAX.

22 January 2003, 13:22:56 CST
Linked notes Set 2, CPU Performance Equation and Benchmarks` to the lectures page. Also updated Set 1. Both may be updated later.

13 January 2003, 18:04:54 CST
Set up Web pages for Spring 2003 semester.

Fall 2002
Fall 2002 What's New

David M. Koppelman - koppel@ece.lsu.edu

Modified 17 May 2003 14:53 (1953 UTC)