| References for material covered in lectures and needed to complete the assignments. |
Developed by Digital Equipment Corporation as a replacement for VAX. Implementations were often the fastest (as measured by the SPEC benchmark suite) but alas not fast enough to save DEC. They were bought by Compaq, which was bought by HP.
Initially designed for embedded systems (in which the CPU would control a piece of hardware), for which it has features that facilitate fast reaction to interrupts and small code size. It has enjoyed steadily growing popularity including for general-purpose computing. Version 8 extended ARM to handle a 64-bit address space, but unlike other ISAs it did so by adding a completely new instruction set, A64, to the existing A32 (Arm) and T32 (Thumb) instruction sets. So the ARMv8 ISA includes three instruction sets, perhaps making the term ISA a bit misleading.
The System/360 was perhaps the first ISA developed with the goal of supporting a range of implementations and the source of the term instruction set architecture. (See the footnote in this historic paper.) The descendants of System/360 are: System/370, System/370-XA, ESA/390, to z/Architecture.
Developed by Intel, used in many personal computers. Popularly called 80x86 and x86_64. No one actually likes this ISA, but its choice by IBM for the more-popular-than-they-every-dreamed PC and Intel's skillful implementations will keep assembly-language programmers in pain for decades.
Developed by Intel as a replacement for IA-32. It is a completely new ISA, not a 64-bit extension of IA-32. It incorporates many features to overcome limits of fin-de-siecle RISC ISAs. The boldness and size of the ISA and the disappointing performance of an early implementation, the Itanium (same name as ISA), inspired the nickname Itanic. But things may change.
Developed by MIPS, which was later bought by Silicon Graphics. Currently a popular choice for embedded applications (such as an automobile engine controller), also still used in some other systems. There are 32- and 64-bit versions of the ISA.
POWER developed by IBM for their RS/6000 workstations, PowerPC later developed by Apple, IBM, and Motorola for use in personal computers (not just Apple computers). The primary reference for PowerPC are the set of PowerPC Books while The PowerPC Architecture: A Specification for a New Family of RISC Processors, might be more readable. The Book E version of the ISA is intended for embedded applications.
Developed by HP, implementations in 1990s were among the fastest processors. PA-RISC 1 is 32 bit, PA-RISC 2 is 64 bit.
RISC-V (the V is for five) is an open set of ISAs developed to support research and education but designed to be complete enough for commercial implementations. There are several mutually incompatible base ISAs, such as RV32I, RV32E, RV64I, plus extensions to these ISAs. The number of instructions in the base ISAs are small, facilitating instruction, research projects, and low-cost implementations. The extensions add instructions that might be needed for certain application areas, such as "F" for floating point.
Developed by Sun Microsystems for their workstations. Managed by SPARC International. Used in the most popular workstations and servers, including those in the ECE department. Unfortunately, implementations are no where near the fastest processors available. SPARC V8 is 32 bits, SPARC V9 is 64 bits (and has other refinements).
Developed by Digital Equipment Corporation (DEC, bought by Compaq, bought by HP) as a extension of their earlier PDP systems. Implementations were very popular in the 1980s, until the rise of RISC workstations and servers.
James R. Larus, SPIM S20: A MIPS R2000 Simulator (138 kB PDF)
Documentation for the SPIM simulator. Additional documentation can be found in Appendix A of Patterson & Hennessy.
Unix is a Four Letter Word... and Vi is a Two Letter Abbreviation, by Christopher C. Taylor. (4.10 kB html)
A 48-page (in PDF form) introduction to Unix. Reasonably concise. Available in HTML, PostScript, and PDF.
| David M. Koppelman - koppel@ece.lsu.edu | Modified 31 Jan 2022 15:46 (2146 UTC) |
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