EE 4755 - Procedures

Contents

Account Setup (Fall 2018)

Background and Workstation Locations

The Verilog assignments for EE 4755 are to be completed on the ECE Linux workstations, which are located in the back of Room 2241 Patrick F. Taylor Hall. The host names of suitable machines can be found on the Computer Status page under the Host Name column. Find a machine in 2241 PFT with a matching label on the front. The labels might only show the first component of the domain name, for example, pulsar instead of pulsar.ece.lsu.edu. Their login screens should display Red Hat Enterprise Linux or Scientific Linux. These systems have the necessary Verilog EDA packages and supporting files.

Steps

• Locate a Linux workstation in the ECE workstation laboratory, Room 2241 Patrick F. Taylor Hall. Their login screens will display Red Hat Enterprise Linux or Scientific Linux.
• Log into a Linux machine with your class account.

  The accounts were (or will be) distributed by E-mail. All passwords start with the characters 2@W, followed by a random string of eight lower-case letters. When you first log in a Gnome graphical desktop should appear.
• Start a shell (command-line interpretor). One way to do this is to right-click the desktop and select Open Terminal.

  A window with Terminal in the title should appear with a Unix prompt. If this looks scary you might need to brush up on Unix commands.
• Run the setup routine by typing:

  [xyz.ece.lsu.edu]% /home/faculty/koppel/pub/ee4755/bin/setup Account has been set up with 0 problems.

  Yes, that's alot to type. However you can save time by pressing the Tab key at certain times, specifically when enough of a path component has been typed to disambiguate the rest. For example, try pressing Tab after just typing /home/f. It should finish the input with faculty. The setup routine will modify your .bashrc and .emacs files. The .bashrc file sets up your account each time you log in (more precisely, each time you create a shell). The .emacs file contains preferences for the Emacs text editor. The only change made to these files is to include other files, so it's okay to edit them. It's also safe to run setup multiple times, though that should not ordinarily be necessary.
• Log out and then log back in.

Remote Access to Workstation Lab (Spring 2023)

Background

It is possible to log into Linux machines in the ECE workstation lab remotely using a computer running Microsoft Windows and Unix variants such as Mac OSX and Linux, and from any other machine with an SSH client. Detailed instructions on logging in remotely appear below for Linux, Mac OSX, and Windows machines.

A remote login can be graphical or nongraphical. With a graphical login (one in which your computer provides an X11 server for graphics and your connection tunnels X11 protocol messages) programs can provide familiar GUIs, though they may be sluggish. Most ordinary GUI programs will run, exceptions include some code used in the GPU programming and microarchitecture courses. If your connection is slow you might choose to connect non-graphically or to run programs in character mode.

Setting up non-graphical remote access is easy on all systems mentioned. Graphical access is easy for Linux and Mac OSX. Nevertheless, don't be so foolish as to first set up remote access with only a few hours left before an assignment deadline.

For EE 4755 (Digital Design using HDLs), GPU Microarchitecture, and EE 4720 (Computer Architecture) it should be possible to complete most assignments non-graphically. For GPU Programming, it will be possible to edit and compile, but probably not possible to run your code.

Linux

This section describes how to connect graphically to ECE Linux computers from another Linux computer. You will be able to run many graphical applications, including the GUI interfaces to Emacs and EDA software. However, programs written for EE 4702-1 (GPU Programming) will not run (in principle they should and one day I'll figure it out or they will start working again). Depending on the bandwidth and especially the latency of your connection, applications may be sluggish. If that's true for Emacs run it nongraphically by starting it using emacs -nw.
• Set up VPN Client Follow these LSU instructions for setting up the Cisco Anyconnect VPN client.
• Connect to an ECE Machine Choose an ECE machine on this list.
• Make sure that the VPN client is connected to LSU.
• Start a terminal. In many systems that can be done by right-clicking the desktop and selecting Terminal or Konsole (KDE). From the terminal window use ssh to log in to your account. In the example below replace xyz with the name of the machine you want to connect to and replace ee470201 with your class account userid.

  mymachine:~ ssh -X xyz.ece.lsu.edu -l ee470201 This prompt is from your computer. ee470201@xyz.ece.lsu.edu's password: 2@Wmypassword You won't really be able to see your password. Last login: Sat Sep 17 16:36:49 2016 from ip72-207-192-52.br.br.cox.net [xyz.ece.lsu.edu] % This prompt is from the remote machine.
• Start working You might start Emacs and then load your assignment. If you are off campus or on a slow connection try starting Emacs with the command emacs-lucid. This will start a graphical version of Emacs, but one which is less sensitive to connection latency than the version of Emacs started using emacs. If you don't want to run Emacs graphically (perhaps because it's too slugish) start Emacs with emacs -nw.

  [xyz.ece.lsu.edu]% emacs-lucid Emacs should start graphically if X11 working.

Mac OSX

This section describes how to connect graphically to ECE Linux systems from a computer running Mac OSX. You will be able to run many graphical applications, including the GUI interfaces to Emacs and EDA software. However, programs written for EE 4702-1 (GPU Programming) will not run (in principle they should and one day I'll figure it out or they will start working again). Depending on the bandwidth and especially the latency of your connection, applications may be sluggish. If that's true for Emacs run it nongraphically by starting it using emacs -nw.
• Set Up VPN Client If not already done, install the Palo Alto GlobalProtect VPN client and configure it for LSU access by following these instructions.
• Connect to LSU VPN If off campus, connect to the LSU VPN using your VPN client. Connect to gateway gp.vpn.lsu.edu. Provide your myLSU (not the same as your class account) userid and password when prompted.
• Check for an X11 Server X11 came with earlier versions of OSX. To see if you have it click the Launchpad icon and open the Other folder, and start Terminal. It should open a command-line interface to OSX. From there try to run xterm:

  Last login: Sat Sep 17 16:46:47 on ttys000 Deborahs-MacBook-Pro:~ $ xterm

  If X11 is working another window should pop up. If it does type exit in that window and proceed to the Connect step below.
• Install an X11 Server In the launchpad Other menu look for an X11 (or X) icon. Click the icon and follow the instructions for downloading and installing XQuartz. You will need to log out and in. Do so and repeat the Check for an X11 Server step.
• Connect to an ECE Machine Choose an ECE machine on this list.
• Make sure the VPN client is connected to LSU.
• Start a terminal by clicking on the Terminal which may be in the Other folder under Launchpad. From the terminal window use ssh (which should come with OSX) to log in to your account. In the example below replace xyz with the name of the machine you want to connect to and replace ee470201 with your class account userid.

  Deborahs-MacBook-Pro:~ ssh -X xyz.ece.lsu.edu -l ee470201 This prompt is from your Mac. ee470201@xyz.ece.lsu.edu's password: 2@Wmypassword You won't really be able to see your password. Last login: Sat Sep 17 16:36:49 2016 from ip72-207-192-52.br.br.cox.net [xyz.ece.lsu.edu] % This prompt is from the remote machine.
• Start working You might start Emacs and then load your assignment. If you are off campus or on a slow connection try starting Emacs with the command emacs-lucid. This will start a graphical version of Emacs, but one which is less sensitive to connection latency than the version of Emacs started using emacs. If you don't want to run Emacs graphically (perhaps because it's too slugish) start Emacs with emacs -nw.

  [xyz.ece.lsu.edu]% emacs-lucid Emacs should start graphically if X11 working.
• Notes For using Emacs it might be useful to tell XQuartz that the Mac command keys should work like Alt keys which Emacs calls Meta keys. To do so locate XQuartz Preferences and from that dialog switch to the Input tab and check the Option keys send Alt_L and Alt_R item.

Windows Systems -- Non Graphical

This section describes how to connect non-graphically to ECE Linux systems from a computer running Microsoft Windows. You will not be able to use graphical applications. It will be possible to run Emacs and other text editors, to compile programs, and to run Verilog simulation and synthesis programs.
• Set Up VPN Client If not already done, install the GlobalProtect VPN client and configure it for LSU access by following these instructions, or use some other AnyConnect-compatible VPN client.
• Connect to LSU VPN If off campus, connect to the LSU VPN using your VPN client. Connect to gateway gp.vpn.lsu.edu. Provide your myLSU (not the same as your class account) userid and password when prompted.
• Set up an SSH Client The following instructions are for PuTTY, a popular SSH client. From the PuTTY site find and download the Windows MSI installer package. Run the installer.

  PuTTY is one of many SSH clients. It is widely used on Windows and so hopefully will have the fewest compatibility issues.
• Connect to an ECE Machine Choose an ECE machine on this list. On your Windows machine locate and click the PuTTY link to start PuTTY. A PuTTY Configuration dialog should pop up. In the Host Name field enter the name of the computer you would like to log into, for example, xyz.ece.lsu.edu (change xyz to a valid name). The Connection type should be set to SSH and the Port should be set to 22. Click the Open button, at the bottom. A command-line interface window should pop up. In response to the login as: prompt enter your ECE account userid, Enter, then your password and Enter:

  login as: ee475501 ee475501@xyz.ece.lsu.edu's password: 2@Wlowercse You should not actually see your password. Last login: Sat Sep 17 14:24:01 2016 from 10.0.28.244
• Start working You might start Emacs and then load your assignment. If you are off campus or on a slow connection try starting Emacs with the command emacs-lucid. This will start a graphical version of Emacs, but one which is less sensitive to connection latency than the version of Emacs started using emacs. If you don't want to run Emacs graphically (perhaps because it's too slugish) start Emacs with emacs -nw.

  [xyz.ece.lsu.edu]% emacs Emacs should start.

  When Emacs starts non-graphically it will replace the contents of the window. Menus can be accessed by pressing F10 and using arrow keys to navigate the menu items.
• Some Notes. When using Emacs you might need to use the left Alt key for the meta key (the right Alt won't work). (For example, to start Emacs' built-in psychologist: Alt-x doctor Enter).

Windows Systems -- Graphical

Establishing a remote graphical connection will let you run programs with their GUIs and to run graphics-only programs. In Unix parlance, you will be running an X11 server on your Windows computer which will let your run X11 clients (graphical programs) on an ECE (or other remote) machine and have them use your X11 server for output. The X11 protocol messages sent between the client and server are usually tunneled through the same SSH connection that is used to log in to the remote machine.

The most convenient way to set this up is to have one program act as both an X11 server and as an SSH client, or a set of such programs designed to work together. Otherwise, a separate X11 server and SSH client must be set up to work together. At some point detailed instructions will be posted here to do this. Those with time to spare might try setting up xming.

Verilog Homework Work Flow (Fall 2021)

Basic Steps

This procedure shows the basic steps needed to work on a Verilog programming homework assignment. These steps are written for Homework 1 in the year 2021, but can easily be adapted to other Verilog assignments by changing 1 to the appropriate digit(s).
• Follow the account setup instructions above for setting up the class account.
• For those unsure whether their account is set up properly, verify that a Cadence HDL simulator, xmvlog, can be run by using the xmvlog command-line option to print the program version. To do so open a shell and enter the command below:

  [xyz.ece.lsu.edu]% xmvlog -version Print version of xmvlog program. TOOL: xmvlog(64) 21.03-s008

  You should see output similar to the sample above. If the account is not set up properly you might see a message like bash: xmvlog: command not found. The xmvlog program is part of the Cadence Xcelium family, which replaced the Cadence Incisive family. In the Incisive family the Verilog simulator program was named ncvlog.
• Copy the assignment files into your class account. Here is how to do so from a command shell:

  [xyz.ece.lsu.edu]% cd ~ Change to your home directory. /home/classes/ee4755/ee47551234 [xyz.ece.lsu.edu]% cp -r /home/faculty/koppel/pub/ee4755/hw/2021/hw01 .

  Don't miss the dot at the end of the command. This copies the hw01 directory into your class account. You should know how to browse the files in the directory, edit, copy, delete them, etc. This may be a good time to practice your Unix shell (command-line interface) skills.

  It is important that the homework assignment directory is at the correct path. The TA Bot will attempt to copy assignment X from directory ~/hw0X. Use the mv (move, rename) command to move a homework directory to the correct path. For example,

  [xyz.ece.lsu.edu]% cd ~ Switch to my home directory. [xyz.ece.lsu.edu]% ls -la List directory, long format, show all files. total 76 drwxr-x--- 11 ee475500 ad4755 4096 Sep 7 12:08 . drwxr-xr-x 37 root root 4096 Aug 23 12:33 .. -rw-r--r-- 1 ee475500 ad4755 353 Sep 6 15:36 .bashrc drwxr-xr-x 5 ee475500 ad4755 4096 Sep 7 12:08 .cache drwxr-xr-x 5 ee475500 ad4755 4096 Sep 7 12:08 .config -rw-r--r-- 1 ee475500 ad4755 137 Sep 6 15:36 .emacs drwxr-xr-x 2 ee475500 ad4755 4096 Sep 7 12:08 Desktop drwxr-xr-x 3 ee475500 ad4755 4096 Sep 6 15:38 hwo1 [xyz.ece.lsu.edu]% mv hwo1 hw01 Change little o to zero.
• Change to the homework assignment directory.

  [xyz.ece.lsu.edu]% cd ~/hw01 Change to directory HOME/hw01. /home/classes/ee4755/ee47551234/hw01
• Verify that files were copied, and look at what's there.

  [xyz.ece.lsu.edu]% ls -la List directory, long format, show all files. total 32 drwxr-xr-x 2 ee475500 ad4755 4096 Aug 28 17:58 . drwxr-x--- 6 ee475500 ad4755 4096 Aug 28 17:58 .. -rw-r--r-- 1 ee475500 ad4755 254 Aug 28 17:58 Makefile -rw-r--r-- 1 ee475500 ad4755 620 Aug 28 17:58 genus_startup.tcl -rw-r--r-- 1 ee475500 ad4755 168 Aug 28 17:58 hdl.var -rw-r--r-- 1 ee475500 ad4755 7824 Aug 28 17:58 hw01.v -rw-r--r-- 1 ee475500 ad4755 1781 Aug 28 17:58 syn.tcl

  Your directory listing may contain a different collection of files, but there should be one of the form hw0X.v.
• Load the homework assignment into an Emacs buffer. From the shell:

  [xyz.ece.lsu.edu]% cd ~/hw01 [xyz.ece.lsu.edu]% emacs hw01.v & Start Emacs in background, have it load hw01.v.

  There is no need to exit Emacs until you are done.
• Verify that Emacs is working correctly.

  If Emacs has been set up properly you should see Verilog comments in red and the text LSU EE 4755 should appear in a black bold sans-serif font. There should also be an EE 4755 entry on the menu bar near the Tools menu.
• Verify that the Verilog simulator is working: Select Simulate from the EE 4755 menu or press F9.

  Simulator output will appear in a pane (called a window in Emacs parlance) below the window in which the Verilog code appears. The output below should appear near the top and indicate that the simulator has started correctly. The names of the modules and other details will differ.

  -*- mode: compilation; default-directory: "~/teach/v21/hw/hw01/" -*- Compilation started at Wed Nov 10 17:03:08 xrun -sv -batch -exit hw01.v TOOL: xrun(64) 21.03-s008: Started on Nov 10, 2021 at 17:03:08 CST xrun(64): 21.03-s008: (c) Copyright 1995-2021 Cadence Design Systems, Inc. file: hw01.v module worklib.insert_at:v errors: 0, warnings: 0 module worklib.shift_left:v errors: 0, warnings: 0
• Read the instructions in the file.

  The comments in file hw01.v either describe the homework problem or provide a link to the problems. Edit hw01.v to complete the assignment. Please just modify one file, unless instructions in the assignment code or the handout indicate that additional files should be modified.
• Solve the problems.

  An exact sequence of commands cannot be provided for this step.
• The assignment will automatically be copied by the TA Bot at the due date, usually close to midnight or in the early morning on the day after the due date. A trial copy may be performed before the due date and a warning E-mail will be sent if the file could not be found.

Verilog Debugging (SimVision, Fall 2017)

Verilog Debugging

This procedure shows how to debug Verilog code using the Cadence SimVision graphical debugging environment. Documentation for SimVision can be found on the course references Web page. If you are in the lab the documentation can be accessed directly.
• Load Verilog File (Optional) Load the Verilog file that you are trying to debug into a text editor, such as Emacs.
• Start SimVision. Change to the directory containing your Verilog code and start SimVision using the tool driver, irun. The example below is for a Homework 2 Verilog file.

  [xyz.ece.lsu.edu]% cd ~/hw02 [xyz.ece.lsu.edu]% irun hw02.v -gui Start SimVision Cadence debugging environment. irun(64): 15.20-s033: (c) Copyright 1995-2017 Cadence Design Systems, Inc. ncsim: *W,DSEM2009: This SystemVerilog design is simulated as per IEEE 1800-2009 SystemVerilog simulation semantics. Use -disable_sem2009 option for turning off SV 2009 simulation semantics. ------------------------------------- Relinquished control to SimVision...

  Two windows should pop up, one titled Design Browser - SimVision and the other labeled Console - SimVision.
• Find the module that you are debugging. Locate the Design Browser pane within the Design Browser window. That pane should have a tree control thing with the root labeled simulator and as a child the top-level module, perhaps named testbench. Expanding a non-leaf node, such as testbench, (by clicking on the tiny plus symbol) will reveal its children, including instantiated modules and procedural code blocks.

  Note that the unit (instance) names of instantiated modules are shown by default, not the name given when defining a module. For example, suppose you are debugging a module named interp, defined module interp #(int jww=12, int amax=255)..., which the testbench instantiates as interp #(jw) i1(mvalid[1]..). Then it would be the unit name, i1, that appears in the Design Browser pane. To show both the module name and unit name click the gear icon on the Design Browser pane and in the Sidebar Options pop-up window check the Module/Unit Names checkbox on the General tab.
• Select the module. Highlight the module that you are trying to debug.

  The Objects pane should show familiar object names.
• Select objects to trace. In the Objects pane select the objects that you are interested in, Ctrl-a selects all of them.
• Tell SimVision to trace the selected objects. Right-click on the highlighted objects and select the Send to Waveform Window option.

  A window labeled Waveform should pop up (if not already there) with the selected objects shown on the left side. The next time the simulation is run the values of the selected objects will be displayed in the Waveform window.
• Run the simulation. Tell SimVision to run the simulator by pressing the toolbar play button (or by selecting Simulation | Run).

  Object values are shown versus time. If you've selected many objects or your simulation runs for a long time, then this step can take alot of time. If so, modify the testbench to perform fewer tests.
• Explore objects of interest. Use the zoom controls on the right side to expand the view, you may need to make the window wider to see them. Use the fat arrow to advance the time cursor to the next or previous change of the highlighted object. Right clicking an item in the Cursor column reveals options to change the radix used to display the item, for example, from hexadecimal to decimal.

  Explore to find other features.
• Debug. Find the point at which what is happening is different than what you think should be happening, then figure out why.
• Edit and re-simulate. Make any changes, either using your favorite text editor or using the editor provided by SimVision. Choose Simulation | Reinvoke Simulator to run the changed code.

Synthesis Steps (Fall 2020)

Verilog Synthesis

This procedure shows the basic steps needed to synthesize a design up to the mapped state using Cadence Genus and the OSU035 Standard Cell technology kit using a typical EE 4755 homework assignment. The assignment will come with a Verilog file (written in SystemVerilog) and initialization files for the various tools. The instructions below assume an initialization file for Cadence Genus, which is named genus_startup.tcl.
• Follow the instructions for setting up a class account.
• Prepare a Verilog file with correctly functioning code. Make sure that each fragment of non-synthesizable code (as small as one line or as large as several modules) is bracketed by // cadence translate_off (before the non-synthesizable code) and // cadence translate_on (after the non-synthesizable code).
• Start a Web browser showing the documentation for the synthesis program. Visit the course references page and look for the synthesis references.
• Start a shell. In Emacs this can be done with the command M-x shell RET. (that should be typed as press and hold Alt, press x, release Alt, type shell, press Enter. (In Emacs notation M-x is read as Meta-x, and it refers to a key label that most keyboards now lack. And yes, RET is from the days when the enter key was labeled return.) Before performing this step practice switching between Emacs buffers so that you can effortlessly switch between the shell and your Verilog code. You can also start a shell from the window manager by right clicking on the desktop and selecting Open in Terminal from the menu.
• Using shell command cd switch to the directory with your Verilog code and using script name genus start Cadence Genus.

  [xyz.ece.lsu.edu]% cd ~/hw01 [xyz.ece.lsu.edu]% genus Start Genus, the synthesis program. Cadence Genus(TM) Synthesis Solution. Copyright 2017 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are registered trademarks and Genus is a trademark of Cadence Design Systems, Inc. in the United States and other countries. Version: 17.14-s037_1, built Wed Apr 18 2018 Setting attribute of root '/': 'command_log' = genus.cmd Setting attribute of root '/': 'stdout_log' = genus.log @genus:root: 1>

  The output above has been shortened, the last three lines are shown.
• Using Genus command read_hdl load the Verilog code. In the example below the Verilog code is in file hw01.v.

  @genus:root:/> read_hdl hw01.v Load an HDL design from file hw01.v read_hdl hw01.v
  The example above does not contain error or warning messages. If there had been errors or warnings, you could have corrected the errors and issued the read command again without exiting Genus (though there would be re-load warnings).
  Errors at this point can be Verilog warnings or errors, meaning the design did not follow the Verilog language (with the class setup, SystemVerilog 2012), or there can be synthesis warnings or errors, meaning the design did not follow the rules imposed by this synthesis program. The Cadence Genus synthesis program at times just ignores unsynthesizable lines after issuing a warning. Please correct such lines since such designs won't be considered synthesizable when grading.
• Using the Genus elaborate command tell Genus which module you'd like to synthesize and what parameters you'd like to set for the module. In the example below module sort3 is chosen and the first parameter, called w in the Verilog, is set to 4. If there were additional parameters they would also be in the curly brackets with 4.

  @genus:root:/> elaborate sort3 -parameters { 4 } Info : Elaborating Design. [ELAB-1] : Elaborating top-level block 'sort3_w4' from file 'hw01.v'. Info : Done Elaborating Design. [ELAB-3] : Done elaborating 'sort3_w4'. Checking for analog nets.... Check completed for analog nets. Info: Checking for source rtl... Info: Check completed for source rtl... UM: Capturing floorplan image ... UM: flow.cputime flow.realtime timing.setup.tns timing.setup.wns snapshot UM: 15 255 elaborate design:sort3_w4 @genus:root: 3>>
• Using Genus command create_clock specify that the target clock frequency is 1 ns, using Genus command set_input_delay specify that values at the module's input ports are available (launched) at the beginning of the clock period, and using Genus command set_output_delay specify that values at the module's output ports are needed (captured) at the end of the clock period. These commands are valid whether or not the module actually has a clock input or any clocked devices.

  @genus:root:/> create_clock -name my_clk -period 1 @genus:root:/> set_input_delay -clock my_clk 0.0 [all_inputs] @genus:root:/> set_output_delay -clock my_clk 0.0 [all_outputs] @genus:root:/>
• Using Genus command set_db specify the effort level for optimization by setting Genus attribute syn_global_effort, then using Genus command syn_gen perform synthesis for a generic technology target. The design will use generic gates when this step is completed.

  @genus:root:/> set_db syn_global_effort high Specify that all synthesis steps (generic, mapped, optimize) should be done at high effort. Setting attribute of root '/': 'syn_global_effort' = high 1 high @genus:root: > syn_gen Start generic optimization. Current PLE settings: Aspect ratio : 1.00 Shrink factor : 1.00 ##>G:Misc 3 ##>-------------------------------------------------------- ##>Total Elapsed 3 ##>======================================================== Info : Done synthesizing. [SYNTH-2] : Done synthesizing 'sort3_w4' to generic gates. UM: Capturing floorplan image ... flow.cputime flow.realtime timing.setup.tns timing.setup.wns snapshot UM: 14 394 syn_generic @genus:root: 8>

  The text above shows only the first and last few lines of text.
• Perform this step to satisfy curiosity or to get a better grasp of what the synthesis program does. (That is, the step can be skipped without affecting synthesis whatsoever.) Using the write_hdl command, tell the synthesis program to write a Verilog version of the synthesized design (in its current state) to a file. In the example below the Verilog is written to file gen.v. The file to write to can have any name.

  @genus:root:/> write_hdl > gen.v write_hdl > gen.v
• Using the Genus command syn_map synthesize from generic gates to gates from the chosen target technology library and then using Genus command syn_opt optimize the mapped design. The example below shows only the first few and last few lines of the extensive output.

  @genus:root:/> syn_map p Current PLE settings: Aspect ratio : 1.00 Shrink factor : 1.00 Scale of res/length : 1.00 Scale of cap/length : 1.00 Net derating factor : 1.00 Thermal factor : 1.00 : Done mapping 'sort3_w4'. UM: Capturing floorplan image ... flow.cputime flow.realtime timing.setup.tns timing.setup.wns snapshot UM: 9 234 syn_map @genus:root: 10> syn_opt t Current PLE settings: Aspect ratio : 1.00 Shrink factor : 1.00 Scale of res/length : 1.00 Scale of cap/length : 1.00 Net derating factor : 1.00 Thermal factor : 1.00 Info : Done incrementally optimizing. [SYNTH-8] : Done incrementally optimizing 'sort3_w4'. UM: Capturing floorplan image ... flow.cputime flow.realtime timing.setup.tns timing.setup.wns snapshot UM: 44 132 syn_opt

  For homework assignments the technology library is specified in the file genus_startup.tcl in the same directory as the assignment.
• Look for the synthesized design under the fv subdirectory, it will be in a file with a name like g1.v.gz (Emacs will automatically unzip it). Or, you can use the write_hdl command again.
• Obtain an area report.

  @genus:root:/> report area ============================================================ Generated by: Genus(TM) Synthesis Solution 17.14-s037_1 Generated on: Aug 28 2018 06:57:44 pm Module: sort3_w4 Technology libraries: osu035_stdcells physical_cells Operating conditions: typical Interconnect mode: global Area mode: physical library ============================================================ Instance Module Cells Cell Area Net Area Total Area --------------------------------------------------------- sort3_w4 136 14784 16991 31775 @genus:root: 12>

  The total area is under the Total Area column in the first row, for instance sort3_w4 in this case.
• Obtain a timing report.

  @genus:root:/> report timing Warning : Possible timing problems have been detected in this design. [TIM-11] : The design is 'sort3_w4'. : Use 'report timing -lint' for more information. ============================================================ Generated by: Genus(TM) Synthesis Solution 17.14-s037_1 Generated on: Aug 28 2018 06:58:55 pm Module: sort3_w4 Operating conditions: typical Interconnect mode: global Area mode: physical library ============================================================ Path 1: VIOLATED (-633 ps) Late External Delay Assertion at pin x1[1] Group: my_clk Startpoint: (R) a1[1] Clock: (R) my_clk Endpoint: (F) x1[1] Clock: (R) my_clk Capture Launch Clock Edge:+ 1000 0 Src Latency:+ 0 0 Net Latency:+ 0 (I) 0 (I) Arrival:= 1000 0 Output Delay:- 0 Required Time:= 1000 Launch Clock:- 0 Input Delay:- 0 Data Path:- 1633 Slack:= -633 #------------------------------------------------------------------------------- # Timing Point Flags Arc Edge Cell Fanout Load Trans Delay Arrival # (fF) (ps) (ps) (ps) #------------------------------------------------------------------------------- a1[1] - - R (arrival) 7 282.5 0 0 0 g61/Y - A->Y F INVX8 1 27.6 14 28 28 g60/Y - B->Y R OAI21X1 1 18.6 103 85 113 g23934/Y - B->Y F NAND2X1 1 27.6 89 76 190 g116/Y - B->Y R OAI21X1 1 18.6 121 105 295 g115/Y - B->Y F NAND2X1 1 23.2 85 71 366 g114/Y - C->Y R NAND3X1 2 36.6 195 130 496 g23922/Y - A->Y R AND2X2 5 113.8 188 234 729 g175/Y - B->Y F NAND2X1 1 18.6 91 68 797 g174/Y - C->Y R OAI21X1 3 68.8 254 193 990 g247/Y - B->Y F OAI21X1 1 27.2 118 92 1082 g245/Y - A->Y R AOI21X1 1 55.4 213 183 1265 g244/Y - A->Y F INVX4 14 316.0 210 205 1469 g1120/Y - B->Y R NAND2X1 1 18.6 110 117 1587 g259/Y - C->Y F OAI21X1 1 0.6 92 46 1633 x1[1] <<< - F (port) - - - 0 1633 #------------------------------------------------------------------------------- @genus:root: 13>

  The timing report above shows the critical path through the design. The end of the critical path is at the bottom, and that's the important number. In the example, above it is 1633 ps. The violation mentioned above is the arrival time of the result at the outputs. We requested 1 ns, but the best it could do was 1.633 ns.
• To help with familiarization, use the gui_show command to pop up a GUI (graphical user interface) to view the schematic and perform some other operations. The GUI will sluggish when connecting remotely.

  rc:/> gui_show gui_show rc:/>

  This step can be done anytime, the earlier the better. After popping up the GUI you can continue to use the command-line interface to enter commands. To view a schematic right-clock on the name of the module and select Schematic View.
• Exit from Cadence Genus.

  @genus:root:/> exit exit Normal exit. [sky.ece.lsu.edu] %

Emacs Text Editor (Fall 2016)

Background

Emacs, at its core, is a text editor, however surrounding that core are many commands and modes to help with programming tasks of all kinds and other activities from the practical, such as editing files on remote computers (look for Remote Files in the documentation), to the amusing, such as inserting keywords designed to attract the attention of counterespionage agents (M-x spook). Emacs has commands for practically anything.

Using Emacs to Edit a File

These steps show how to use Emacs to edit a file. The first step shows how to start Emacs graphically, which is what you'd want to do if you were not connecting remotely. Connecting non-graphically is the better option if you were connecting remotely (say from your PC at home).
• To run Emacs graphically type emacs & in a command shell or start using the Applications | Accessories | Emacs Text Editor menu items.

  A window should pop up, the frame will be labeled Emacs.
• To run Emacs non-graphically type emacs -nw in a command shell.

  Emacs should start, there should be a character-mode menu across the top.
• Load a file by selecting Open File... from the Files menu. If running non-graphically press F10 to access the menus.
• Enter a file name. Note that text may appear in the bottom of the main window in an area called the minibuffer, or in a dialog box. (Once loaded, the file name will appear in the mode line near the bottom of the window.)
• Enter text in the buffer to try out the editor.
• Select Save Buffer from the Files menu to save.
• When done with editing for the day select Exit Emacs from Files to exit.

  Many users prefer to leave Emacs open with multiple files rather than exiting and re-starting Emacs for each file edited.

Running the Emacs Tutorial

The tutorial is an introduction for first-time users.
• Start emacs.
• Select Emacs Tutorial from the Help menu. Do not attempt to learn everything the first day.

Starting Info, Emacs' Help

Info provides detailed documentation for Emacs and other programs.
• Start Emacs
• Select Browse Manuals from Help menu.
• Following instructions, select the Emacs manual.