EE 4755, Digital Design Using HDLs

Lecture slides and examples used in class.

The current status of the computers in Room 2241 P.F. Taylor Hall. Updated every 10 minutes.

Instructions on how to use the software, including the Verilog simulation, Verilog synthesis, and Emacs (text editor).

Software manuals and information on Verilog.

Additional material on Verilog inference and synthesis.

The most accessed Web pages for this course over the past three days.

Includes solutions.