Denver,
Colorado, USA
April 4 - 5, 2005
The 12th Reconfigurable Architectures Workshop
(RAW 2005) will be held at the
Omni Interlocken Resort
,
Denver
,
Colorado
,
USA, on April 4 and 5, 2005. RAW
2005 is associated with the 19th Annual
International Parallel & Distributed Processing Symposium (IPDPS 2005)
and is sponsored by the
IEEE Computers Society
's
Technical Committee on Parallel Processing
.
RAW 2005 is one of the major meetings for researchers to present ideas, results, and
on-going research on both theoretical and practical advances in Reconfigurable
Computing.
Main Focus of the Workshop:
Run-Time
Reconfiguration & Adaptive Computing: Architectures, Algorithms, Technologies
Run-Time and Dynamic Reconfiguration are characterized
by the ability of underlying hardware architectures or devices to rapidly
alter (on the fly) the functionalities of its components and the interconnection
between them to suit the problem. Key to this ability is reconfiguration
handling and speed. Though theoretical models and algorithms for them have
established reconfiguration as a very powerful computing paradigm, practical
considerations make these models difficult to realize. On the other hand,
commercially available devices (such as FPGAs and new coarse-grain FPFAs)
appear to have more room for exploiting run-time reconfiguration (RTR). An
appropriate mix of the theoretical foundations of dynamic reconfiguration,
and practical considerations, including architectures, technologies and tools
supporting RTR is essential to fully reveal and exploit the possibilities
created by this powerful computing paradigm. RAW 2005 aims to provide a forum
for creative and productive interaction between all these disciplines.
Topics of Interest:
Authors are invited to submit manuscripts
of original unpublished research in all areas of dynamic and run-time reconfiguration
(foundations, algorithms, hardware architectures, devices, systems-on-chip
(SoC), technologies, software tools, and applications). The topics of
interest include, but are not limited to:
Models & Architectures
Theoretical Interconnect & Computational
Models
RTR Models and Systems
RTR Hardware Architectures
Optical Interconnect Models
Simulation and Prototyping
Bounds and Complexity Issues
|
Algorithms & Applications
Algorithmic Techniques
Mapping Parallel Algorithms
Distributed Systems & Networks
Fault Tolerance Issues
Wireless and Mobile Systems
Automotive Applications
Infortainment & Multimedia
Biology Inspired Applications
|
Technologies & Tools
Configurable Systems-on-Chip
Energy Efficiency Issues
Devices and Circuits
Reconfiguration Techniques
High Level Design Methods
System support
Adaptive Runtime Systems
Organic Computing
|
Submission Guidelines:
Submissions closed for RAW 2005
All manuscripts will be reviewed by at least
three members of the program committee. Submissions should be a complete
manuscript (not to exceed 8 pages of single spaced text, including figures
and tables)
or, in special cases, may be a summary of relevant work. Submissions
should be in pdf-format (preferred), or alternatively in Postscript (level
2) format. Authors should make sure that the submission can be viewed using
ghostscript and will print on standard letter size paper (8.5" x 11").
The IEEE CS Press will publish the IPDPS symposium
and workshop abstracts as a printed volume. The complete symposium and workshop
proceedings will also be published by the IEEE CS Press as a CD-ROM disk.
Important Dates:
- Manuscript due
November 2, 2004
- Notification of acceptance/rejection
December 17, 2004
- Final version due
January 21, 2005
Organization :
Workshop Chair:
Serge Vernalde, IMEC, Belgium
vernalde@imec.be
Program Chair:
Jürgen Becker, Universitat Karlsruhe (TH), Germany
becker@itiv.uni-karlsruhe.de
Steering Chair:
Viktor K. Prasanna, University of Southern California, USA
prasanna@ganges.usc.edu
Publicity Chair (USA):
Ramachandran Vaidyanathan,
Louisiana State University, USA
vaidy@ece.lsu.edu
Publicity Chair (Europe, Asia):
Reiner Hartenstein, Kaiserslautern University of Technology, Germany
reiner@hartenstein.de
Program Committee:
-
Jeffrey Arnold, Adaptive Silicon, Inc., USA
-
Jürgen Becker, Universität Karlsruhe (TH), Germany
-
Neil Bergmann, University of Queensland, Australia
-
Christophe Bobda, Universität Erlangen-Nürnberg, Germany
-
Don Bouldin, University of Tennessee, USA
-
Gordon Brebner, University of Edinburgh, UK
-
Klaus Buchenrieder, Universität der Bundeswehr München, Germany
-
Thomas Büchner, IBM, Germany
-
Luigi Carro, Universidade Federal do Rio Grande
-
Peter Y. K. Cheung, Imperial College of Science Technology & Medicine, London, UK
-
Jose T. de Sousa, Technical University of Lisbon, Portugal
-
Oliver Diessel, University of New South Wales, Australia
-
Pedro C. Diniz, University of Southern California/ISI, USA
-
Adam Donlin, Xilinx
-
Gilbert Edelin, Thales Research and Technology
-
Hossam ElGindy, University of New South Wales, Australia
-
Patrick Girard, LIRMM, Montpellier, France
-
Manfred Glesner, Darmstadt University of Technology, Germany
-
Herbert Gruenbacher, Vienna University of Technology, Austria
-
Steve Guccione, Quicksilver Technology, USA
-
Wolfram Hardt, Technische Universität Chemnitz, Germany
-
Reiner Hartenstein, University of Kaiserslautern, Germany
-
Ulrich Heinkel, Lucent Technologies, Germany
-
Andreas Herkersdorf, Institute for Integrated Systems
-
Thomas Hollstein, Darmstadt University of Technology, Germany
-
Mike Hutton, Altera, USA
-
Mark Jones, Virginia Tech., USA
-
Udo Kebschull, Universität Leipzig, Germany
-
Mohammed A. S. Khalid, University of Windsor, Canada
-
Andreas Koch, Technische Universität Braunschweig
-
Fabrice Kordon, Université Pierre & Marie Curie, Paris, France
-
Rainer Kress, Infineon Technologies, Germany
-
Markus Kuehl, Forschungszentrum Informatik (FZI), Karlsruhe, Germany
-
Rudy Lauwereins, IMEC, Leuven, Belgium
-
Philip Leong, Chinese University of Hong Kong, China
-
Marnane Liam, University College, Ireland
-
Rong Lin, State University of New York, Geneseo, USA
-
Wayne Luk, Imperial College, UK
-
Jürgen Luka, DaimlerChrysler AG, Germany
-
Patrick Lysaght, Xilinx, USA
-
Malgorzata Marek-Sadowska, University of California, Santa Barbara, USA
-
John McHenry, National Security Agency, USA
-
Alessandro Mei, University Rome "La Sapienza", Italy
-
Martin Middendorf, Universitäty of Leipzig, Germany
-
Amar Mukherjee, University of Central Florida, USA
-
Dietmar Müller, Technische Universität Chemnitz, Germany
-
Koji Nakano, Hiroshima University, Japan
-
Ranjani Parthasarathi, School of Computer Science and Engineering,
Anna University, Chennai, India
-
Cameron Patterson, Virginia Tech., USA
-
Marco Platzner, Swiss Federal Institute of Technology (ETH) Zuerich,
Switzerland
-
Bernard Pottier, Université de Bretagne Occidentale, France
-
Franz Rammig, Universität Paderborn, Germany
-
Ricardo Reis, Universidade Federal do Rio Grande
-
Hartmut Schmeck, Universität Karlsruhe (TH), Germany
-
Sakir Sezer, Queen's University, N. Ireland, U.K.
-
Gerard Smit, University of Twente, The Netherlands
-
V. Sridhar, Satyam Computer Services Ltd., India
-
Jürgen Teich, Friedrich-Alexander-Universitaet Erlangen, Germany
-
Lionel Torres, LIRMM, Montpellier, France
-
Jim Tørresen, University of Oslo, Norway
-
Jerry L. Trahan, Louisiana State University, USA
-
Nick Tredennick, Gilder Technology
-
Ramachandran Vaidyanathan, Louisiana State University, USA
-
Milan Vasilko, Bournemouth University, UK
-
Stamatis Vassiliadis, Delft University of Technology, The Netherlands
-
Serge Vernalde, IMEC, Belgium
-
Martin Vorbach, PACT Informationstechnologie, Germany
-
K. Waldschmidt, Universität Frankfurt, Germany
-
Norbert Wehn, University of Kaiserslautern, Germany
-
Hans Christoph Zeidler, Universität der Bundeswehr Hamburg, Germany
RAW 2005 Home
http://www.ece.lsu.edu/vaidy/raw05/