References for material covered in lectures and needed to complete the assignments. For references prepared for this class see study guides page. Passwords are required for outside (of lsu.edu) access to certain material (due to copyright restrictions). The user name is ee3755, the password can be obtained by authorized users (LSU students, faculty, and staff) from David M. Koppelman.
A 48-page (in PDF form) introduction to Unix. Reasonably concise, but very outdated. Available in HTML, PostScript, and PDF.
The IEEE standard for SystemVerilog 2017, IEEE 1800-2017. This document describes the language in complete detail. Keep in mind that the course will not cover the entire language. This should not be used as the only reference for those completely unfamiliar with Verilog.
An introduction to SimVision, the GUI to the Cadence simulation programs. Using SimVision you can get a logic-analyzer-like view of the objects in your Verilog design during simulation, facilitating debugging.
Reference for the ChipWare library of handy components that can be used in Verilog and VHDL designs. Password needed if accessed from off campus. (UserID is ee3755)
Two-page, triptych-foldable, quick reference guide for Verilog. (Company promotion.) Recommended.
A 32-page (PDF) guide to “old school” (pre-1995) Verilog used at Bucknell University and widely cited. Useful if you didn't buy the book or if you need the material described differently.
Using Encounter RTL Compiler Version 14.2 April 2015 (1.71 MB PDF)
User guide to RTL Compiler, a Cadence synthesis program. Password needed if accessed from off campus. (UserID is ee3755)
Reference guide for RTL Compiler, a Cadence synthesis program. Password needed if accessed from off campus. (UserID is ee3755)
Description of the synthesis capabilities and limits of the Cadence Encounter RTL Compiler. Password needed if accessed from off campus. (UserID is ee3755)
|David M. Koppelman - firstname.lastname@example.org||Modified 17 Aug 2018 14:53 (1953 UTC)|
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