EE 4755, Digital Design Using HDLs


When / Where / Details

Fall 2025: MWF 11:30-12:20 CT 1206 Taylor Hall
Fall 2025 Syllabus

Current Lectures

Lecture slides and examples used in class.

Computer Status

The current status of the computers in Room 2241 P.F. Taylor Hall. Updated every 10 minutes.

Procedures

Instructions on how to use the software, including the Verilog simulation, Verilog synthesis, and Emacs (text editor).

References

Software manuals and information on Verilog.

Study Guide

Additional material on Verilog inference and synthesis.

Grades

What's Popular

The most accessed Web pages for this course over the past three days.

Assignments and Exams

Includes solutions.
Screenshot of design.
RSS Feed What's New
10 October 2025, 14:54:50 CDT
The deadline for Homework 2 has been pushed to Wednesday, 15 October 2025. Do not expect further extensions.

9 October 2025, 16:41:58 CDT
If you copied the Homework 2 files before 16:40 on 9 October 2025, you will not be able to use SimVision to debug your code, though you will be able to get frustratingly close. Object names in the SimVision waveform viewer will be marked "No read access". The problem is due to a missing initialization file. To fix the problem enter command: cp /home/faculty/koppel/pub/ee4755/hw/2025/hw02/hdl.var ~/hw02 (all one one line). Make sure that you just copy that one file.

8 October 2025, 14:33:01 CDT
If you copied the Homework 2 files before 14:30 on 8 October 2025, there will be an error in one of the assignment files that will result in an error when attempting to synthesize. (If you copied after 14:30 then you got the fixed version.) The error message will read in part "could not find an HDL design". There are two ways of fixing this. My preferred solution is that you edit syn.tcl and replace occurrences of "_func" with "_proc" (there are just two occurrences). The other fix is to just copy the file. That can be done using the command cp /home/faculty/koppel/pub/ee4755/hw/2025/hw02/syn.tcl ~/hw02 (all one one line) and answer yes when it asks you about overwriting a file. Make sure that you are only copying one file and not clobbering whatever you did in hw02.v. Does the risk of clobbering scare you? If so, edit syn.tcl.

What Was New
9 more items starting 7 October 2025, 16:33:33 CDT.


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