EE 4755, Digital Design Using HDLs

When / Where / Details

Fall 2018: MWF 9:30-10:20 CT Room 226 Tureaud Hall
Fall 2018 Syllabus

Current Lectures

Lecture slides and examples used in class.


Instructions on how to use the software, including the Verilog simulation, Verilog synthesis, and Emacs (text editor).


Software manuals and information on Verilog.

Study Guide

Additional material on Verilog inference and synthesis.


Assignments and Exams

Includes solutions.
Screenshot of design.
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Set up pages for Fall 2018 semester.

Fall 2017
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David M. Koppelman -
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