Proteus is an execution-driven parallel-computer simulator which can simulate message-passing parallel computers, shared-memory parallel computers, or systems using both communication paradigms. The simulated system can have physically or virtually addressed memory; in virtual memory systems pages can be moved between processors at any time. Stores can be nonblocking and loads can complete in or out of order with stores. (With in-order loads the memory model is sequentially consistent.) Several different networks and cache-coherence schemes can be simulated; others can be added through user-written code. C programs, written using Proteus' parallel programming constructs, run on the simulated machines. Execution speed (with respect to clock frequency) is adjustable. Proteus can collect and present many different statistics describing the simulated machine (running the C programs), for example, processor states, cache and TLB hit ratios, and procedure execution times. Proteus can be used for the study of network, memory system, and other aspects of parallel computer design.
The version of Proteus described here has been tested on Sun Microsystems SPARC machines running SunOS 4.1.3 and Solaris 2.5.
Proteus was written at MIT, primarily by Eric Brewer and Chrysanthaos Dellarocas. A distribution for that version of Proteus can be found via @hfill@break `ftp://ftp.lcs.mit.edu:/pub/brewer/proteus-V3.01.tar.Z'. A related web page can be found via `http://jukebox.lcs.mit.edu/~brewer'. Eric Brewer is currently an Assistant Professor at the University of California, Berkeley and can be contacted at `brewer@hera.EECS.Berkeley.EDU'.
The version of Proteus described here is a modified version of the MIT distribution. The changes include bug fixes and new features needed for research being conducted at LSU; the new features are documented here. When it is necessary to distinguish the versions the local version will be called Proteus L and the original version will be called Proteus 3.
The most significant changes are in the simulation of shared memory.
Simulation of shared memory with the LSU version is more convenient,
flexible, faster, and most importantly, accurate. Unlike Proteus 3, shared
pointers can be dereferenced using the usual C operators (e.g., a
= *b; c = d[e]; f = g->h;), easing porting. Shared memory can be
dynamically allocated so that, while occupying a contiguous block of
address space, is spread over several memory modules. (See section V2 Memory Allocation.) Less
host memory is used for simulation and simulation is faster. Simulation
is more accurate since shared memory access functions are inserted in
user code at the assembler level, not the source-code level where they
distort compiler output. (E.g., saving volatile registers around
shared-memory function calls.)
No attempt has been made to support all configurations of Proteus 3. A set of configurations is used to test and debug Proteus, so these can be expected to work correctly. Other configurations, for example the Alewife networks and send/receive message passing, are not regularly tested, and so may not work. The test suite used in developing Proteus is part of the distribution; supported configurations can be found in the script file used for testing, `valid/TestScript'. (See section Running Proteus Multiple Times for background on the script files.) The following features are not yet supported:
The primary documentation for Proteus is the Proteus User Documentation, Version 0.5, a reference manual available in Postscript form; it can be found in the `doc' directory in files `docFOO.ps'. Also in this directory is `News', containing new features listed by release. Features may be documented in `News' before being documented here. Other documentation can be found in the comments of some engine header files.