Power consumption has increasingly become important in computer systems. Current designs of processor cores are predicting power figures above 100 Watts. The management of power consumption while simultaneously delivering acceptable levels of performance is becoming a critical task with the proliferation of systems in several application domains such as wireless communication and embedded signal processing. In addition, it is important to manage power consumption in high-performance general purpose microarchitectures. It has been forecast that without significant advances in design for low power, processors of the future will consume hundreds of watts of power. We believe that an integrated hardware and software approach is required. A lot of attention has been paid to optimizing power at the circuit and gate levels. Recently, power optimizations at the architecture and software (i.e., compiler, operating system, and application) level have begun to receive attention.
The purpose of this workshop is to draw together researchers and practitioners concerned with compiler and operating system support for low power for a stimulating exchange of views. We will also try to answer questions like where the power goes in high-performance and low-performance architectures, and are computer architectures really power-efficient. Presentations from invited speakers from both the industry and academia will provide insight into these questions.
A proposal for an edited book based on extended versions of accepted papers is pending with Kluwer Academic Publishers. The aim is to have this volume published by December 2001.
Topics of interest include (but are not limited to):
Note that the deadline has been extended to August 8th 2001. Please email submissions by August 8, 2001. You should receive an acknowledgment of your submission by the following week. Authors will be notified of acceptance or rejection by August 20, 2001 and the final papers are due by August 30, 2001.
All submissions will be refereed, and workshop attendees will receive
copies of all accepted papers. Selected papers from the papers presented
in the workshop will be published as an edited book by Kluwer
August 8: Electronic submission due August 17: Notification of authors August 24: Final version of papers due
Luca Benini, DEIS Universita' di Bologna, firstname.lastname@example.org Mahmut Kandemir, Penn State University email@example.com J. Ramanujam, Louisiana State University firstname.lastname@example.org
Eduard Ayguade, Univ. Politecnica de Catalunya email@example.com R. Chandramouli, Stevens Institute of Technology firstname.lastname@example.org Bruce Childers, University of Pittsburgh email@example.com Marco Cornero, STMicroelectronics firstname.lastname@example.org Rudi Eigenmann, Purdue University email@example.com Manish Gupta, IBM T. J. Watson firstname.lastname@example.org Rajiv Gupta, University of Arizona email@example.com Mary Janie Irwin, Penn State University firstname.lastname@example.org Uli Kremer, Rutgers University email@example.com Rainer Leupers, University of Dortmund leupers@LS12.cs.uni-dortmund.de Diana Marculescu, Carnegie Mellon University firstname.lastname@example.org Enric Musoll, Clearwater Networks, Inc. email@example.com Anand Sivasubramaniam, Penn State University firstname.lastname@example.org Mary Lou Soffa, University of Pittsburgh email@example.com Vamsi K. Srikantam, Agilent Laboratories firstname.lastname@example.org Chau-Wen Tseng, University of Maryland email@example.com Arnout Vandecappelle, IMEC/DESICS firstname.lastname@example.org N. Vijaykrishnan, Penn State University email@example.com