EE 4720 - Lectures

The latest set of lectures are here (which may be this page). The set of links below will not be complete until the end of the semester. For a preview of what's to come see last semester's lectures.

Midterm Exam Review	Set 3: Instruction Set Design
Final Exam Review	Set 4: Control Transfer and Other Instructions
Set 1: ISA, Implementation, and Technological Change	Set 8: Interrupts, Exceptions, and Traps
Set 2: CPU Performance Equation, Benchmarks	Set 9: Long Latency Operations (floating point, etc)
Set 2.1: Optimization	Set 11: Multiple Issue (VLIW and Superscalar)
Set 2.5: MIPS Overview	Set 12: Branch Prediction, Speculative Execution (Under construction)
Set 6: Unpiplined and Pipelined MIPS Implementations	Set 10: Dynamic Scheduling (Under Construction)
Set 2.7: ISA Families Overview; MIPS, DLX, SPARC	Set 13: Caches and Memory (Under Construction)

Midterm Exam Review
Covered 25 October 2006
[Slides, Normal (46.4 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Final Exam Review
Covered 8 December 2006
[Slides, Normal (60.5 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 1: ISA, Implementation, and Technological Change
Book sections 1.2, 1.3. Covered 28 August 2006
[Slides, Normal (78.2 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 2: CPU Performance Equation, Benchmarks
Book sections 1.5, 1.6. Covered 30 August, 1, 8, 11 September 2006
[Slides, Normal (145 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 2.1: Optimization
Covered 1, 6, 8 September 2006
Set 2.5: MIPS Overview
Covered 13, 15, 18, 20 September 2006
Set 6: Unpiplined and Pipelined MIPS Implementations
Book sections 3.1, 3.2, 3.3, 3.4. Covered 20, 22, 25, 27, 29 September, 9,11 October 2006
[Slides, Normal (219 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 2.7: ISA Families Overview; MIPS, DLX, SPARC
Book sections 2.6, 2.8. Covered 29 September, 2, 4 October 2006
Set 3: Instruction Set Design
Book sections 2.1, 2.2, 2.3. Covered 11, 13, 15, 18 October 2006
[Slides, Normal (206 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 4: Control Transfer and Other Instructions
Book sections 2.4, 2.5. Covered 18, 20 October 2006
[Slides, Normal (148 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 8: Interrupts, Exceptions, and Traps
Book sections 3.6. Covered 1, 3, 6 November 2006
[Slides, Normal (84.1 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 9: Long Latency Operations (floating point, etc)
Book sections 3.7, 4.1. Covered 6, 8, 10 November 2006
[Slides, Normal (162 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 11: Multiple Issue (VLIW and Superscalar)
Book sections 4.4. Covered 10, 15 November 2006
[Slides, Normal (94.2 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 12: Branch Prediction, Speculative Execution (Under construction)
Book sections 4.3. Covered 17, 20, 22 November 2006
[Slides, Normal (142 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 10: Dynamic Scheduling (Under Construction)
Book sections 4.2, 4.8. Covered 27, 29 November, 1 December 2006
[Slides, Normal (174 kB PDF)]
[Slides, 4 per Page (321 B PDF)]
Set 13: Caches and Memory (Under Construction)
Book sections 5.1, 5.2, 5.3, 5.7, 5.8. Covered 1, 4, 6 December 2006
[Slides, Normal (160 kB PDF)]
[Slides, 4 per Page (321 B PDF)]

David M. Koppelman - koppel@ece.lsu.edu

Modified 8 Dec 2006 12:27 (1827 UTC)

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