Ashok Srivastava

Wilbur D. and Camille V. Fugler, Jr. Professor 

Address:

      
Louisiana State University
      Division of Electrical & Computer Engineering
      Baton Rouge, LA 70803-5901

Tel:      225-578-5622
Fax:     225-578-5200
E-mail:  eesriv@lsu.edu

Professional Experience: 32 years in academia including sabbatical at KU/IMEC, Leuven, Belgium; Indian Institute of Information Technology, Allahabad, India; Philips Research, Eindhoven, The Netherlands; summer research at NanoLab, Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland; Jet Propulsion Laboratory/Caltech; and Phillips Laboratory, Kirtland AFB plus 10 years of R&D in integrated circuit Design (BJT & CMOS) and Technology.

 

Research Interests: Low Power VLSI Circuit Design and Testability (Digital, Analog and Mixed-Signal); Noise in Devices and VLSI Circuits; Nanoelectronics (Non-classical Device Electronics with focus on Carbon Nanotube, Graphene and other 2D materials for post-CMOS VLSI and Emerging Integrated Electronics; RF Integrated Circuits; Semiconductor Devices Modeling; Radiation-hard Integrated Circuits; and Low-Temperature Electronics

 

Professional Memberships of Learned Societies: Life Senior Member (#07751878) - Institute of Electrical and Electronics Engineers (IEEE): Member Electron Devices Society; Member Circuits and Systems Society; Member Solid-State Circuits Society;      Member IEEE Nanotechnology Council; Member IEEE Computer Society and Technical Committee on VLSI (TCVLSI); Member – SPIE (elevated to Sr. Member, 2015 for Achievements in Smart Sensors and CMOS-MEMS Microsystems); Member - ECS (The Electrochemical Society); Member - ASEE

 

Scholarly Service: Associate Editor, IEEE Transactions on Nanotechnology

Editor-in-Chief, Jounrnal of Sensor Technology, published by the Scientific Research, USA

Past Member of the Editorial Review Board of the International Journal of Nanotechonlogy and Molecular Computation (IJNMC), published by the Information Resource Mangement Association, USA

Member of the Editorial Board of Modeling and Numerical Simulation of Material Science (MNSMS), published by the Scientific Research, USA

A. Srivastava, LSU; S. Mohanty, UNT; S. Hu, MTU; and P. Ghoshal, IIEST, India (Guest Editors) for Special Issue on Hardware Assisted Techniques for IoT and Bigdata Applications, Elsevier, Integration, the VLSI Journal, 2017

Advisory Review Board (2012 - present): NSF CREST Center for Nano- and Bio- Inspired Materials and Devices (CNBMD) and NSF RISE Research Infrastructure for Scienece and Engineering, Norfolk State University, Norfolk, Virginia

IEEE Review Panel – Senior Member Review Panel, 7 February 2015

 

Reviewer: Grant proposals from the Research Grant Council (RGC) of Hong Kong, China; Science Center Programs of the U.S. Department of State; American Chemical Society Petroleum Research Funds, NSF Review Panels; papers from numerous journals and conferences; books from various international publishers

 

Program Committees: Served in technical program committees of numerous international conferences in various capacities.

Biography: Dr. Ashok Srivastava obtained M. Tech. and Ph.D. degrees in Solid State Physics and Semiconductor Electronics area from Indian Institute of Technology, Delhi in 1970 and 1975, respectively. He joined the Department of Electrical & Computer Engineering of Louisiana State University, Baton Rouge in 1990 and is Wilbur D. and Camille V. Fugler, Jr., Professor of Engineering in the School of Electrical Engineering & Computer Science. In year 2011, he held visiting appointments at the Institute of Electrical Engineering NanoLab, Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland; Katholiek Universiteit/Inter-university Microelectronics Center (IMEC), Leuven, Belgium; Indian Institute of Information Technology (IIIT), Allahabad; and in year 2001 at the Philips Research Laboratory, Eindhoven, The Netherlands. His other past appointments include Central Electronics Engineering Research Institute, Pilani, India (1975-84); Birla Institute of Technology and Science, Pilani, India (1975); North Carolina State University, Raleigh (1985-86); State University of New York, New Paltz (1986-90); University of Cincinnati, Cincinnati (1979); University of Arizona, Tucson (1979-80); Kirtland Air Force Base, New Mexico (Summer 1996); and Jet Propulsion Laboratory/California Institute of Technology, Pasadena (Summer 2004).

 

Dr. Srivastava is the recipient of the prestigious 1979-1980 UNESCO Fellowship Award and Dean College of Engineering 1994 Teaching Award, Louisiana State University. He holds 1 US patent and several technology disclosures. He is the author of the book titled, Carbon-Based Electronics – Transistors and Interconnects at the Nanoscale, Pan Stanford Publishing, 2015 and co-editor of two books titled, Nano-CMOS Electronics: Devices and Modeling and Circuits and Design published by IET Press, UK.  He has authored/co-authored more than 170 technical papers, including conference proceedings and book chapters. He has graduated 41 students in Electrical Engineering including 8 PhDs who are employed by academic institutions, VLSI chip design and semiconductor companies across the globe. He has also supervised many MS (EE) students with non-thesis and project options. He gave numerous professional including invited talks and as an eminent scientist, plenary and key note speaker in international conferences. He is the reviewer of numerous papers of international journals and conferences, books, examiner of overseas PhD dissertations and has served on NSF review panels and advisory board of NSF CREST and program committees of international conferences in various capacities.  He serves on the Editorial Review Board of the Journal of Modeling and Numerical Simulation of Material Science (MNSMS), Journal of Material Science and Chemical Engineering (JMSCE). He is the Editor-in-Chief of the Journal of Sensor Technology published by the Scientific Research, USA and serves as an Associate Editor on the Editorial Board of IEEE Transactions on Nanotechnology.  He has been awarded nearly 5.3 million U.S. dollars grants and contracts from federal, state, industry and foundations. He is a Life Senior Member of IEEE, Electron Devices, Circuits and Systems, Solid-State Circuits Societies, and Computer Society, Member of IEEE Nanotechnology Council, and Sr. Member of SPIE and Member ASEE.

 

Awards and Recognition: Dean College of Engineering Scholarship Award (spring 2015) for the book titled, “Carbon-Based Electronics – Transistors and Interconnects at Nanoscale,” Pan Stanford Publishing, 2015.

 

Wilbur D. and Camille V. Fugler, Jr., Professor of Engineering from College of Engineering, Louisiana State University, fall 2011

2017 IEEE CS iNIS 2016 Best Paper Award 

2015 IEEE ISVLSI 2015 Best Ph.D. Forum Paper Award

2010 IEEE ISED (International Symposium on Electronic System Design, India) 2010 Best Paper Award

2010 Louisiana State University Flagship Faculty (featured in LSU Today, 5 November 2010)

2004 ASEE-NASA Faculty Fellow, Jet Propulsion Laboratory/Caltech., Pasadena, CA

1996 Air Force Office of Scientific Research Summer Faculty Research Program Award, (Phillips Laboratory, Kirtland AFB, NM), April 1996

1994 College of Engineering Dean’s Teaching Award

1993-94 College of Engineering Dean’s Teaching Award in Recognition of Excellence in Undergraduate Instruction, New Teaching Innovations, and Attention to the Educational Needs of Our Students, August 1994

College of Engineering Dean’s Recognition for Teaching in spring 1994

United Nations Educational, Scientific and Cultural Organizational (UNESCO) Fellow for studies in the field of Integrated Circuit Modules, Department of Electrical and Computer Engineering, University of Cincinnati, Cincinnati, Ohio, 1979; and Department of Electrical and Computer Engineering, University of Arizona, Tucson, Arizona, 1979-80

Recipient of Merit Scholarships including Senior Research Fellowships from Council of Scientific and Industrial Research, and Ministry of Defense, India, 1968-74

Graduated with the Highest Distinction (First in the Class of 1970) in M.Tech., Indian Institute of Technology, Delhi, 1970

 

Following Doctoral students* were recipients of awards/recognition:

*Zhao Zhou received 2015 IEEE ISVLSI 2015 Best Ph.D. Forum Paper Award.

*Dr. Jose Marulanda (Ph.D. Electrical Engineering, 2008) was nominated by the College of Engineering for the 2008 LSU Distinguished Dissertation Award.

*Dr. Yao Xu (Ph.D. Electrical Engineering, May 2011) was selected among 12th finalists in Student Paper Contest (SPC) in 52nd   IEEE International Midwest Symposium on Circuits and Systems, 2009.

*Dr. Chi Zhang (Ph.D. Electrical Engineering, 2006) was selected among 12th finalists in Student Paper Contest (SPC) in nearly 144 submitted papers from 27 countries in 49th IEEE International Midwest Symposium on Circuits and Systems, 2006.

*Dr. Chuang Zhang (Ph.D. Electrical Engineering, 2005) was the recipient of 4th award among 10 finalists in Student Paper Contest (SPC) in nearly 200 submitted papers from 30 countries in 45th IEEE International Midwest Symposium on Circuits and Systems, 2002.

Graduated PhD Students (Past 10 years):
1. Yasser Mohammadi Banadaki “Physical Modeling of Graphene Nanoribbon Field-Effect Transistor Using Non-equilibrium Green Function Approach for Integrated Circuit Design,” Ph.D. (Electrical Engineering), May 2016.

2. Rajiv Soundararajan, “Programmable CMOS Analog-to-Digital Converter Design and Testability,” Ph.D. (Electrical Engineering), December 2012.

3. Y. Liu, “Phase Noise in CMOS Phase-Locked Loop Circuits,” Ph.D. (Electrical Engineering), December 2011.

4. Yao Xu, “Carbon Nanotube Interconnect Modeling for Very Large Scale Integrated Circuits,” Ph.D. (Electrical Engineering), May 2011.

5.  Siva Sankar Yellampalli, “Quiscent Current Testing of CMOS Data Converters,” Ph.D. (Electrical Engineering), December 2008.

6. Jose Mauricio Marulanda, “Current Transport Modeling of Carbon Nanotube Field Effect Transistors for Analysis and Design of Integrated Circuits,” Ph.D. (Electrical Engineering), August 2008. 

7. Chi Zhang, “A Study of Phase Noise and Jitter in Submicron CMOS Phase-Locked Loop Circuits,” Ph.D. (Electrical Engineering), December 2006.

8. Chuang Zhang, “Techniques for Low Power Analog, Digital and Mixed-Signal CMOS Integrated Circuit Design,” Ph.D. (Electrical Engineering), May 2005.

 

Current PhD Students:

1.     Md. Shamiul Fahad (BS 2009, Islamic University of Technology (IUT), Bangladesh), “Modeling of Two-Dimensional Graphene-Based Tunnel Field-Effect Transistor for Integrated Circuit Design,” joined in spring 2012, passed PhD qualifying (spring 13), General Exam – 26 April 2016, expected graduation spring 17.

2.     K. M. Mohsin (BS 2011, Bangladesh University of Engineering and Technology), “Thermal Modeling of Carbon Nanotube and Graphene Nanoribbon Interconnects,” joined in spring 2012, passed PhD qualifying (spring 13), expected graduation fall 17.

3.     XinLu Chen, (BS 2012, Shadong University, China), “Photo-effect Studies in Graphene and Graphene-based Devices,” joined in fall 2014, passed PhD qualifying (fall 15).

4.     Zhou Zhao (MS 2014, University of Electronic Science & Technology, China), “Dark Silicon in VLSI Chip Multiprocessor,” joined in fall 2014, passed PhD qualifying (fall 15).

5.     Khondoker Murad Hossain (BS 2016, University of Dhaka, Bangladesh), Integrated Nano-photonics Devices and Circuits, joined spring 2017.

Books:

A. Srivastava, Carbon Based Electronics: Transistors and Interconnects at the Nanoscale, Co-authors (not editors): Y. Xu, J. Marulanda and A.K. Sharma; Pan Stanford Publishing, Singapore, 2015.

S. Mohanty and A. Srivastava (Editors), Nano-CMOS and Post-CMOS Electronics: Devices and Modeling; IET Press, 2016.

S. Mohanty and A. Srivastava (Editors), Nano-CMOS and Post-CMOS Electronics: Devices and Modeling; Nano-CMOS and Post-CMOS Electronics: Circuits and Design, IET Press, 2016.

 

Journal Publications (2012 - present):

1.   Zhou Zhao, A Srivastava, L. Peng, S. Chen and S. Mohanty, “A novel switchable pin method for regulating power in chip microprocessor,” Integration, the VLSI journal (Special Issue on: Hardware Assisted Techniques for IoT and Big Data Applications) accepted 2016 (in press).

2.   S. Chen, S.O. Irving, L. Peng, Y. Zhang and A. Srivastava, “Using switchable pins to increase off-chip bandwidth in chip-multiprocessors, IEEE Trans on Parallel and Distributed Systems (TPDS), vol. 28, issue 1, pp. 274-289, January 2017. DOI: 10.1109/TPDS.2016.2546246. 

3.  A. Srivastava, Md. S. Fahad, “Vertical MoS2/hBN/MoS2 interlayer tunneling field-effect transistor,” Solid-State Electronics, vol. 126, pp. 96-103, December 2016.

4.   B. SanthiBhushan, Anurag Srivastava, Md. S. khan and A. Srivastava, “Transport, electronic and structural studies of boron-group V linear atomic chains under tensile stress for nanoscale devices and interconnects: first principles analysis,” IEEE Trans on Electron Devices (T-ED), vol. 63, no. 12, pp. 4899-4906, December 2016.

5.   Md. S. Fahad and A. Srivastava, “A graphene switching transistor for vertical circuit design,” ECS Journal of Solid State Science and Technology, vol. 5, no. 3, pp. M13-M21, 2016.

6.   Md. S. Fahad, A. Srivastava, A.K. Sharma and C. Mayberry, “Analytical current transport modeling of graphene nanoribbon tunnel field-effect transistors for digital circuit design,” IEEE Trans. on Nanotechnology, vol. 15, no. 1, pp. 39-50, January 2016.

7.  Y. M. Banadaki and A. Srivastava, “Effect of Edge roughness of graphene nanoribbon on static characteristics of field effect transistor,” for Special Issue, “Two-Dimensional Electronics – Prospects and Challenges,” the journal Electronics, vol. 5, no. 11, pp. 1-19, 18 March 2016.

8.   Y. Banadaki and A. Srivastava, “Investigation of the width-dependent static characteristics of  graphene nanoribbon field-effect transistors,” Solid-State Electronics, vol. 111, pp. 80-90, 2015. DOI Bookmark: http://dx.doi.org/10.1016/j.sse.2015.05.003

9.   Y. M. Banadaki and A. Srivastava, “Scaling effects on static metrics and switching attributes of graphene nanoribbon FET for Emerging Technology,” IEEE Trans on Emerging Topics in Computing(Special Issue), vol. 3, no. 4, pp. 458-469, December 2015.        

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TETC.2015.2445104

10. S. Chen, L. Peng, Y. Hu, Z. Zhao, A. Srivastava, Y. Zhang, J.-W Choi, B. Li and E. Song, “Powering Up Dark Silicon: Mitigating the Limitation of Power Delivery via Dynamic Pin Switching,” IEEE Trans on Emerging Topics in Computing(Special Issue),vol. 3, no. 4, pp. 489-501, December 2015.

11. S. Varshney, M. Goswami, B.R. Singh, and A. Srivastava, “Low power-variable resolution analog-to-digital converter,” J. Low Power Electronics, vol. 10, no. 2, pp. 236-246, June 2014

12. K.  M. Mohsin, A. Srivastava, A. K. Sharma and C. Mayberry, “A thermal model for carbon nanotube interconnects,” nanomaterials (Special Issue: CNT based Nanomaterials), Vol. 3(2), pp. 229-241, 2013.

13. A. Srivastava, Y. Xu, Y. Liu, A.K. Sharma and C. Mayberry, “CMOS LC voltage controlled oscillator design using carbon nanotube wire inductors,” ACM J. Emerging Technologies in Computing Systems(Special Issue), vol. 8, no. 3, Article 15, pp. 15.1-15.9, August 2012.

14. R. Soundararajan and A. Srivastava, “A programmable oversampling CMOS delta-sigma analog-to-digital converter for low-power interface electronics,” J. Low Power Electronics, vol. 8, no. 3, pp. 336-346, June 2012.

15. Y. Liu and A. Srivastava, “CMOS phase-locked loop circuits and hot carrier effects,” J. Low Power Electronics, vol. 8, no. 3, pp. 304-316, June 2012.

 

Conference Publications (2012 - present):

1.   Y. Banadaki and A. Srivastava, “Width-dependent characteristics of graphene nanoribbon field effect transistor for high frequency applications,” in Proc. 2nd IEEE Computer Society International Symposium on Nanoelectronic and Information Systems (iNIS), (Gwalior, India, December 19-13, 2016), pp. 1-5, (Received Best Paper Award).

2.   Md Fahad, Zhou Zhao, A. Srivastava and L. Peng, “Modeleing of graphene nanoribbon tunnel field effect transistor in Verilog-A for digital circuit design,” in Proc. 2nd IEEE Computer Society International Symposium on Nanoelectronic and Information Systems (iNIS), (Gwalior, India, December 19-13, 2016), pp. 1-5, (Received Student Travel Award).

3.   M.S. Fahad, A. Srivastava, A.K. Sharma, C. Mayberry and K.M. Mohsin, “Silicene nanoribbon tunnel field-effect transistor,” in Proc. PRiME 2016/230th ECS Meeting (Honolulu, Hawaii, October 2-7, 2016), pp. 1-7.

4.  K.M. Mohsin, A. Srivastava, A.K. sharma, C. Mayberry and M.S. Fahad, “Current transport in graphene/copper hybrid nanoribbon interconnect: a first principle study, in Proc. PRiME 2016/230th ECS Meeting(October 2-7, 2016, Honolulu, Hawaii, October 2-7, 2016), pp. 1-5.

5.   Z. Zhao, A. Srivastava, L. Peng and S.M. Mohanty, “A low-cost mixed clock generator for high-speed adiabatic logic,” Proc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 587-590, (July 11-13, 2016, Pittsburgh, PA). 

6.   Y.M. Banadaki, A. Srivastava and S. Sharifi, “Metallic single-walled carbon nanotube for ionized radiation detector,” Proc. SPIE 9802 (Nanosensors, Biosensors, and Info-Tech Sensors and Systems 2016), vol. 980203, pp. 1-9, (March 21-24, 2016, Las Vegas, Nevada).

7.  Y.M. Banadaki, A. Srivastava and S. Sharifi, “Graphene nanoribbon field effect transistor for nanometer-size on-chip temperature sensor,” Proc. SPIE 9802 (Nanosensors, Biosensors, and Info-Tech Sensors and Systems 2016), vol. 980203, pp. 1-9, (March 21-24, 2016, Las Vegas, Nevada),

8.  Z. Zhou, A. Srivastava, L. Peng, S. Chen and S. Mohanty, “Circuit Implementation of switchable pins in chip multiprocessor,” Proc. of 1st IEEE Computer Society International Symposium on Nanoelectronic and Information Systems, pp. 89-94, (Indore, India, December 21-23).

9.  Y. M. Banadaki, A. Srivastava and S. Sharafi, “ Clocked adiabatic XOR and XNOR CMOS gates design based on graphene nanoribbon complementary field effect transistors,” Proc. of 1st IEEE Computer Society International Symposium on Nanoelectronic and Information Systems, pp. 13-17, (Indore, India, December 21-23).

10. K. M. Mohsin and A. Srivastava, “Characterization of SWCNT bundle based VLSI interconnect with self-heating induced scatterings,” ACM/SIGDA Proc. of GLSVLSI, pp. 265-270, (Pittsburgh, PA, May 20-22, 2015).

11. Z. Zhao, A. Srivastava, S. Chen and S. Mohanty, “An algorithm used in power monitor to mitigate dark silicon on VLSI chip,” in Proc. IEEE Computer Society Annual Symposium on VLSI, pp. 1-4, (Montpellier, France, July 8-10, 2015). Received Best Ph.D. Forum Paper Award.

12. A. Bekal, R. Joshi, M. Goswami, B.R. Singh and A. Srivastava, “An improved dynamic latch based comparator for 8-bit asynchronous SAR ADC, in Proc. IEEE Computer Society Annual Symposium on VLSI, pp. 1-6 (Montpellier, France, July 8-10, 2015).

13. S. Chen, Y. Zhang, L. Peng, J. Ardonne, S. Irving and A. Srivastava, “Increasing of-chip bandwidth in multi-core processors with switchable pins,” in Proc. of The 41st International Symposium on Computer Architecture (ISCA 2014), pp. 1-12, (Minneapolis, MN, June 14-18, 2014).

14. K.M. Mohsin, A. Srivastava, A.K. Sharma and C. Mayberry, “Characterization of MWCNT VLSI interconnects with self-heating induced scatterings,” Proc. of 2014 IEEE Computer Society Annual Symposium on VLSI, pp. 368-373, (9-11 July, 2014 Tampa, FL).

15. A. Srivastava, Y.M. Banadaki and Md. S. Fahad, “Dielectrics for graphene transistors for emerging integrated circuits,” IEEE EDS/ECS International Symposium on Dielectrics for Nanosystems, 225th ECS Meeting (May 11-16, 2014, Orlando, FL), ECS Transactions, Chapter 9, vol. 61, pp. 351-361, invited paper (cross listed under Chapters in Books).

16. Y.  M. Banadaki, K. M. Mohsin and A. Srivastava, “A graphene field-effect transistor for high-temperature sensing applications,” Proc. SPIE (Smart Structures/NDE: Nano-, Bio-, and Info-Tech Sensors and Systems: SSNO6), vol. 9060, pp. 90600F-1-90600F-7, (March 9-13, 2014, San Diego, CA), invited paper.

17. K.M. Moshin, Y.M. Banadaki and A. Srivastava, “Metallic Single-walled carbon nanotube based temperature sensor,” Proc. SPIE (Smart Structures/NDE:  Nano-, Bio-, and Info-Tech Sensors and Systems: SSNO6), vol. 9060, pp. 906003-1-906003-7, (March 9-13, 2014, San Diego, CA), invited paper. 

18. Md. Fahad, A. Srivastava, A.K. Sharma and C. Mayberry, “Current transport in grapheme tunnel field effect transistor under constant electric field,” SPIE 2013 Nanoscience+Engineering: Carbon Nanotubes, Graphene, and Associated Devices VI (OP109), Proc. of SPIE, vol. 8814 (in press), 8 pages  (25-29 August 2013, San Diego, CA). 

19. Y. M. Banadaki and A. Srivastava, “A novel graphene  nanoribbon field effect transistor for integrated circuit design,” Proc. of The 56th IEEE Midwest Symposium on Circuits and Systems (IEEE MWSCAS 2013), 4 pages (August 4-7, 2013, Columbus, OH).

20. M. S. Fahad, A. Srivastava and A.K. Sharma, C. Mayberry, “Current transport in graphene   tunnel field effect transistor for RF integrated circuits,” Proc. IEEE MTT-S International Wireless Symposium, 4 pages (13-18 April 2013, pp. 1-4, Beijing, China).

21. A. Srivastava and R. Soundararajan, “Testing of Trusted CMOS data converters,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2012), pp. 350-355 (August 19-21, 2012, University of Massachusetts, Amherst, MA).

22. A. Srivastava, Y. Xu, A.K. Sharma and C. Mayberry, “Electronic current transport in CNT-FETs for operation in ballistic region,” Proc. SPIE Conference 8344: Nano-, Bio-, and Info-Tech Sensors and Systems, vol. 8344, pp. 83440O-1 to 83440O-10, (San Diego, March 12-15, 2012). 

23. A. Srivastava, “Transistor and Interconnect Modeling for Design of Carbon Nanotube Integrated Circuits,” in Proc. 19th International Conference on Mixed Design of Integrated Circuits and Systems, (May 24-26, 2012, Warsaw, Poland).

Undergraduate Courses: 

EE4242: VLSI Design

EE4240: Linear Integrated Circuit

EE4250: Digital Integrated Circuit

EE2810 Tools in EE (co-developed)

EE3001 Electronics II

Capstone Projects

Electronic Circuits, Electronics I & II

Digital Logic and Microprocessor Design

Graduate Courses: 

EE7242: VLSI Systems

EE7248: Mixed-Signal Integrated Circuit Design

EE7246: Integrated Sensors and Actuators

EE7000: Wireless Communications – System Design and (VLSI) Circuit Implementation

Microelectronics, Energy Processing Techniques

EE7230: Physics of Device Electronics

EE7200: Nanoelectronics: Nanoscale Devices, Circuits and Integration

EE7200: RF CMOS and Microwave Integrated Circuits

University Services: Served in numerous committees of department, college and university in various capacities.

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