Miss Catchup   PSE CPU Visualization Output

System: Four-Way Superscalar Running: The gcc Compiler (cc1)

The code fragment below suffers several level-1 cache misses which take 18 cycles to resolve. Immediately following the first instruction that misses are roughly twenty instructions that depend on the loaded value. Following those are a few instructions that don't depend on the loaded value (or others retrieved by missing instructions) and they execute. The ROB fills until the load finally completes, at which time instructions commit at full speed. Near the end of the fragment commit has caught up with the rest of the processor.