February 25 2012: Workshops and Tutorials
February 26 2012: Workshops and Tutorials
Welcome reception: 6:00 p.m. February 26th.
Day
1, February 27:
Opening remarks: 8:30-9:00
Keynote: 9:00 - 10:00 (joint session with PPoPP)
Social Networking at Scale
Sanjeev Kumar, Facebook Inc.
Session
1a: Reliability (10:30-12:00)
Session Chair: Ahmed Louri
MACAU: A Markov Model
for Reliability Evaluations of Caches Under Single-bit and Multi-bit
Upsets
Jinho Suh (Dept of Electrical Engineering, University of Southern
California),
Murali Annavaram (Dept of Electrical Engineering, University of
Southern California),
Michel Dubois (Dept of Electrical Engineering, University of Southern
California)
|
Efficient
Scrub Mechanisms for Error-Prone
Emerging Memories
Manu
Awasthi (University of Utah), Manjunath Shevgoor
(University of Utah), Kshitij Sudan (University of Utah), Bipin
Rajendran (IBM
Research), Rajeev Balasubramonian (University of Utah), Viji Srinivasan
(IBM
Research)
|
Booster:
Reactive Core Acceleration for
Mitigating the Effects of Process Variation and Application Imbalance
in
Low-Voltage Chips
Timothy
N. Miller (The Ohio State University), Xiang Pan (The
Ohio State University), Renji Thomas (The Ohio State University), Naser
Sedaghati (The Ohio State University), Radu Teodorescu (The Ohio State
University)
|
Session
1b: Memory Systems I (10:30-12:00)
Session Chair: Thomas Wenisch
Staged
Reads: Mitigating the Impact of DRAM
Writes on DRAM Reads
Niladrish Chatterjee (University of Utah), Naveen Muralimanohar
(Hewlett
Packard), Rajeev Balasubramonian (University of Utah), Al Davis
(University of
Utah), Norman P. Jouppi (Hewlett Packard)
|
Balancing
DRAM locality and parallelism in
shared memory CMP systems
Min
Kyu Jeong (The University of Texas at Austin), Doe Hyun Yoon (Hewlett-Packard Laboratories), Dam Sunwoo
(ARM Inc.), Mike Sullivan
(The
University of Texas at Austin), Ikhwan Lee (The University of Texas at
Austin),
Mattan Erez (The University of Texas at Austin)
|
MORSE:
Multi-Objective Reconfigurable
SElf-Optimizing Memory Scheduler
Janani
Mukundan (Cornell University), José F. Martínez (Cornell
University)
|
Session
2a: Heterogenous Architectures (1:30-3:30)
Session Chair: Martha Kim
The
Case for GPGPU Spatial Multitasking
Jacob
T. Adriaens (University of Wisconsin, Madison), Katherine
Compton (University of Wisconsin, Madison), Nam Sung Kim (University of
Wisconsin, Madison), Michael J. Schulte (AMD)
|
TAP: A TLP-Aware Cache Management Policy for a CPU-GPU Heterogeneous Architecture
Jaekyu Lee
(Georgia Institute of
Technology), Hyesoon Kim (Georgia Institute of Technology)
|
CPU-Assisted GPGPU on Fused CPU-GPU
Architectures
Yi Yang
(North Carolina State University),
Ping Xiang (North Carolina State University), Mike Mantor (Advanced
Micro
Devices), Huiyang Zhou (North Carolina State University)
|
Design,
Integration and Implementation of the DySER Hardware Accelerator into
OpenSPARC
Jesse
Benson
(University of Wisconsin,
Madison), Ryan Cofell (University of Wisconsin, Madison), Chris
Frericks (University of Wisconsin, Madison), Chen-Han Ho (University of
Wisconsin, Madison),
Venkatraman Govindaraju (University of Wisconsin, Madison), Tony
Nowatzki
(University of Wisconsin, Madison), Karthikeyan Sankaralingam
(University of
Wisconsin, Madison)
|
Session
2b: Parallel Architectures (1:30-3:30)
Session Chair: Milo Martin
SCD:
A Scalable Coherence Directory with
Flexible Sharer Set Encoding
Daniel
Sanchez (Stanford University),
Christos Kozyrakis (Stanford University)
|
Pi-TM:
Pessimistic Invalidation for Scalable
Lazy Hardware Transactional Memory
Anurag Negi
(Chalmers University of
Technology, Sweden), Ruben Titos-Gil (Universidad de Murcia,
Spain, Manuel
E. Acacio (Universidad de Murcia, Spain), Jose M. Garcia (Universidad de Murcia,
Spain) Per
Stenstrom (Chalmers University of Technology, Sweden)
|
BulkSMT:
Designing SMT Processors for Atomic-Block
Execution
Xuehai Qian
(University of Illinois,
Urbana-Champaign), Benjamin Sahelices (University of Valladolid), Josep
Torrellas (University of Illinois, Urbana-Champaign)
|
Supporting
Efficient Collective Communication
in NoCs
Sheng Ma (National
University of Defense
Technology, University of Toronto), Natalie Enright Jerger (University
of
Toronto), Zhiying Wang (National University of Defense Technology)
|
Session
3a: Memory Systems and I/O (4:00-5:30)
Session Chair: Benjamin Lee
Quasi-Nonvolatile
SSD: Trading Flash Memory
Nonvolatility to Improve Storage System Performance for Enterprise
Applications
Yangyang Pan
(Rensselaer Polytechnic
Institute), Guiqiang Dong (Rensselaer Polytechnic Institute), Qi Wu
(Rensselaer
Polytechnic Institute), Tong Zhang (Rensselaer Polytechnic Institute)
|
System-level
Implications of Disaggregated Memory
Kevin Lim (HP Labs), Yoshio Turner (HP
Labs), Jose Renato Santos (HP Labs), Alvin AuYoung (HP Labs), Jichuan
Chang (HP
Labs), Parthasarathy Ranganathan (HP Labs), Thomas F. Wenisch
(University of Michigan)
|
Improving
Write Operations in MLC Phase Change Memory
Lei Jiang
(University of Pittsburgh), Bo
Zhao (University of Pittsburgh), Youtao Zhang (University of
Pittsburgh), Jun
Yang (University of Pittsburgh), Bruce R. Childers (University of
Pittsburgh)
|
Session
3b: Caches (4:00-5:30)
Session Chair: Josep Torrellas
Adaptive
Set-Granular Cooperative Caching
Dyer Rolan
(Universidade da Coruna), Basilio B. Fraguela (Universidade da Coruna),
Ramon Doallo (Universidade da Coruna)
|
Cache
Restoration for Highly Partitioned Virtualized Systems
David Daly (IBM Research), Harold W.
Cain (IBM Research)
|
Decoupled
Dynamic Cache Segmentation
Samira M.
Khan (The University of Texas at
San Antonio), Zhe Wang (The University of Texas at San Antonio), Daniel
A.
Jimenez (The University of Texas at San Antonio)
TCCA Business Meeting (6:30)
|
Day
2, February 28th:
Keynote: 9:00 - 10:00 (joint session with PPoPP)
Parallel Programming Needs Data-centric Foundations
Keshav Pingali, University of Texas
Session
4: Best Paper session (10:30-12:00)
Session Chair: Ronny Ronen
Computational
Sprinting (Best paper award winner)
Arun
Raghavan (University of Pennsylvania),
Yixin Luo (University of Michigan), Anuj Chandawalla (University of
Michigan),
Marios Papaefthymiou (University of Michigan), Kevin P. Pipe
(University of
Michigan), Thomas F. Wenisch (University of Michigan), Milo M. K.
Martin
(University of Pennsylvania)
|
Power
Balanced Pipelines
John Sartori
(University of Illinois,
Urbana-Champaign), Ben Ahrens (University of Illinois,
Urbana-Champaign),
Rakesh Kumar (University of Illinois, Urbana-Champaign)
|
Flexible Register
Management using Reference Counting
Steven
Battle (Drexel University), Andrew
Hilton (IBM), Mark Hempstead (Drexel University),
Amir Roth
(University of Pennsylvania)
|
Session
5a: Power and Energy (1:30-3:30)
Session Chair: Rakesh Kumar
AgileRegulator: A
Hybrid Voltage Regulator Scheme Redeeming DarkSilicon for Power
Efficiency in a Multicore Architecture
Guihai
Yan (Institute of Computing Technology, Chinese Academy of Sciences),
Yingmin Li (Qualcomm), Yinhe Han (Institute of Computing Technology,
Chinese Academy of Sciences), Xiaowei Li (Institute of Computing
Technology, Chinese Academy of Sciences), Minyi Guo (Shanghai Jiao Tong
University), Xiaoyao Liang (Shanghai Jiao Tong University)
|
JETC:
Joint Energy Thermal and Cooling
Management for Memory and CPU Subsystems in Servers
Raid Ayoub
(University of California, San Diego), Rajib Nath (University of
California, San Diego), Tajana
Simunic Rosing (University of
California, San Diego)
|
Cooperative
Partitioning: Energy-Efficient
Cache Partitioning for High-Performance CMPs
Karthik T.
Sundararajan (The University of
Edinburgh), Vasileios Porpodas (The University of Edinburgh), Timothy
M. Jones
(The University of Cambridge), Nigel P. Topham (The University of
Edinburgh),
Bjorn Franke (The University of Edinburgh)
|
Dynamically
Heterogeneous Cores Through 3D Resource Pooling
Houman
Homayoun (University of California,
San Diego), Vasileios Kontorinis (University of California, San Diego),
Amirali
Shayan (University of California, San Diego), Ta-Wei Lin (University of
California, San Diego), Dean Tullsen (University of California, San
Diego)
|
Session
5b: Parallel Programming and Architectures (1:30-3:30)
Session Chair: Natalie Enright Jerger
Architectural
Support for Synchronization-Free Deterministic Parallel Programming
Cedomir
Segulja (University of Toronto),
Tarek Abdelrahman (University of Toronto)
|
Pacman:
Tolerating
Asymmetric Data Races with
Unintrusive Hardware
Shanxiang Qi
(University of Illinois at
Urbana-Champaign), Norimasa Otsuki (Renesas Electronics Corp.), Lois
Orosa
Nogueira (Universidad de Santiago de Compostela), Abdullah Muzahid
(University
of Illinois at Urbana-Champaign), Josep Torrellas (University of
Illinois at
Urbana-Champaign)
|
BulkCompactor:
Optimized Deterministic Execution via Conflict-Aware Commit of Atomic
Blocks
Yuelu Duan
(Department of Computer Science,
University of Illinois at Urbana-Champaign), Xing Zhou (Department of
Computer
Science, University of Illinois at Urbana-Champaign), Wonsun Ahn
(Department of
Computer Science, University of Illinois at Urbana-Champaign), Josep
Torrellas
(Department of Computer Science, University of Illinois at
Urbana-Champaign)
|
Parabix: Boosting the
Efficiency of Text Processing on Commodity Processors
Dan Lin
(Simon Fraser University), Nigel
Medforth (Simon Fraser University), Kenneth S. Herdy (Simon Fraser
University), Arrvindh Shriraman (Simon Fraser
University), Rob Cameron (Simon Fraser University)
|
Session
6a: Performance Modeling (4:30-5:30)
Session Chair: Bronis de Supinski
WEST:
Cloning Data Cache Behavior using Stochastic Traces
Ganesh Balakrishnan (North Carolina State
University and IBM), Yan Solihin (North Carolina State University)
|
Statistical
Performance Comparisons of Computers
Tianshi Chen (Institute of Computing
Technology, Chinese Academy of Sciences), Yunji Chen (Institute of
Computing
Technology, Chinese Academy of Sciences), Qi Guo (Institute of
Computing
Technology, Chinese Academy of Sciences), Olivier Temam (National
Institute for
Research in Computer and Control Sciences (INRIA), Saclay), Yue Wu
(Institute
of Computing Technology, Chinese Academy of Sciences), Weiwu Hu
(Institute of
Computing Technology, Chinese Academy of Sciences)
|
Session
6b: Best of CAL Session (4:30-5:30)
Session Chair: Christos Kozyrakis
Heterogeneity in “Homogeneous” Warehouse-Scale Computers: A Performance Opportunity (CSDL | Xplore)
Jason Mars (University of Virginia), Lingjia Tang (University of Virginia), Robert Hundt (Google)
|
A Dependable Cache Coherence Multicore Architecture (CSDL | Xplore)
Omer Khan (MIT, University of Massachusetts, Lowell), Mieszko Lis (MIT), Yildiz Sinangil (MIT), Srinivas Devadas (MIT)
|
B-Fetch:Branch Prediction Directed Prefetching for In-Order Processors (CSDL | Xplore)
Reena Panda (Texas A&M), Paul V. Gratz (Texas A&M), Daniel A. Jiménez (Universty of Texas at San Antonio)
|
Cache Impacts of Datatype Acceleration (CSDL | Xplore)
Lisa Wu (Columbia), Martha A. Kim (Columbia), Stephen A. Edwards (Columbia)
|
Banquet/Excursion: (6:45 - 9:15)
Cruise on the Steamboat Natchez, a 19th-century-style sternwheel steamboat.
Boarding begins at 6:45 at Toulouse St Wharf. Boat departs at 7:15.
Day
3, February 29th
Session
7: Industrial Track (8:30-10:00)
Session Chair: Vijay Janapa Reddi
Accelerating
Business Analytics Applications
Valentina Salapura,
Tejas Karkhanis, Priya Nagpurkar, Jose Moreira (IBM T.J. Watson Research Center)
Architectural
Perspectives of Future Wireless Base Stations based on the IBM
PowerENTM
Processor
Augusto Vega, Pradip Bose, Alper
Buyuktosunoglu, Jeff Derby, Michele Franceschini, Charles Johnson,
Robert Montoye (IBM Research)
QuickIA:
Exploring Heterogeneous Architectures on Real Prototypes
Nagabhushan Chitlur, Ganapati
Srinivasa, Scott Hahn, P K Gupta, Dheeraj Reddy, David Koufaty, Paul
Brett, Abirami Prabhakaran, Li Zhao, Nelson Ijih, Suchit Subhaschandra,
Sabina Grover, Xiaowei Jiang, Ravi Iyer (Intel)
Session
8: NoCs (10:30-12:00)
Session Chair: Ramon Canal
Network
Congestion Avoidance Through Speculative Reservation
Nan Jiang
(Stanford University), Daniel
U. Becker (Stanford University), George Michelogiannakis (Stanford
University),
William J. Dally (NVIDIA and Stanford University)
|
Network
within a Network Approach to Create a Scalable High-Radix Router
Microarchitecture
Jung Ho Ahn
(Seoul National University),
Sungwoo Choo (Seoul National University), John Kim (KAIST)
|
Whole
Packet Forwarding: Efficient Design of Fully Adaptive Routing
Algorithms for
Networks-on-Chip
Sheng Ma
(National University of Defense
Technology and University of Toronto), Natalie Enright Jerger
(University of
Toronto), Zhiying Wang (National University of Defense Technology)
|
(version 201202231926