A. Skavantzos and F.J. Taylor, "High-speed error correcting codes for residue arithmetic units," in Proceedings of the Seventeenth Asilomar Conference on Circuits, Systems, and Computers, (Pacific Grove, CA, Nov. 1983), pp. 332-336.
A. Skavantzos, M. Griffin, and F. J. Taylor, "On the multidimensional
RNS and its applications to the design of fast digital systems,"
in Proceedings of the 1987 IEEE International Conference on Acoustics,
Speech, and Signal Processing, (Dallas, TX, April 1987), pp. 1991-1994.
A. Skavantzos and T. Stouraitis, "Residue complex multipliers,"
in Proceedings of the twenty-sixth Annual Allerton Conference
on Communication, Control, and Computing, (Monticello, IL, Sept.
1988), pp. 1044-1045.
A. Skavantzos and F.J. Taylor, "Parallel decomposition of
multipliers modulo ," in Proceedings of the 1988 International
Conference on Computer Design (ICCD 88), (Rye Brook, NY, October
1988), pp. 502-506.
T. Stouraitis and A. Skavantzos, "Parallel decomposition
of complex multipliers," in Proceedings of the twenty-second
Asilomar Conference on Signals, Systems, and Computers, (Pacific
Grove, CA, Nov. 1988), pp. 379-383.
Z. Sarkari, A. Skavantzos, and T. Stouraitis, "A reconfigurable
systolic array for polynomial multiplication modulo ," in
Proceedings of the 21st Southeastern Symposium on System Theory
(SSST-89), (Tallahassee, FL, March 1989), pp. 460-464.
A. Skavantzos, Z. Sarkari, and T. Stouraitis, "A complex
DSP processor using polynomial encoding," in Proceedings
of the 1989 IEEE International Conference on Acoustics, Speech,
and Signal Processing, (Glasgow, Scotland, May 1989), pp. 1310-1313.
A. Skavantzos, "Designing fast convolvers for residue number
systems," in Proceedings of the twenty-third Asilomar Conference
on Signals, Systems, and Computers, (Pacific Grove, CA, Nov. 1989),
pp. 497-501.
A. Skavantzos, "The one over eight squared algorithm:
a new way for computing convolutions and complex multiplications,"
in Proceedings of the 1990 International Symposium on Circuits
and Systems (ISCAS'90), (New Orleans, LA, may 1990), pp. 61-64.
Z. Sarkari and A. Skavantzos, "Linear arrays for residue
mappers," in Proceedings of the International Conference
on Applications Specific Array Processors, (Princeton, NJ, September
1990), pp. 309-316.
A. Skavantzos and T. Stouraitis, "Implementing complex multipliers
by means of polynomial products," in Proceedings of the Twenty-Fourth
Asilomar conference on Signals, Systems, and Computers, (Pacific
Grove, CA, November 1990), pp. 923-927.
A. Skavantzos, "ROM table reduction techniques for computing
the squaring operation using modular arithmetic," in Proceedings
of the Twenty-Fifth Asilomar Conference on Signals, Systems, and
Computers, (Pacific Grove, CA, November 1991), pp. 413-417.
S. Turimella and A. Skavantzos, "Implementation aspects of
convolvers using non-binary arithmetic," in Proceedings of
the Twenty-Fifth Asilomar Conference on Signals, Systems, and
Computers, (Pacific Grove, CA, November 1991), pp. 90-94.
A. Skavantzos, "Multiplierless signal processors using table
look-ups and residue arithmetic," in Proceedings of the 1992
International Conference on Acoustics, Speech, and Signal Processing,
(San Francisco, CA, March 1992), pp. IV 349-IV352.
A. Skavantzos and N. Mitash, "Theory and implementation issues
of the 2-Dimensional polynomial residue number system," in
Proceedings of the IEEE Southeastcon '92, (Birmingham, AL, April
1992), pp. 226-233.
P.B. Rao and A. Skavantzos, "New multiplier designs based
on squared law algorithms and table look-ups," in Proceedings
of the Twenty-Sixth Asilomar Conference on Signals, Systems, and
Computers, (Pacific Grove, CA, October 1992), pp. 686-690.
D. Soudris, V. Paliouras, T. Stouraitis, and A. Skavantzos, "Systematic
design of full adder-based architectures for convolution,"
in Proceedings of the 1993 IEEE International Conference on Acoustics,
Speech, and Signal Processing, (Minneapolis, MN, April 1993),
pp. I 389-I 392.
S.W. Kim, T. Stouraitis and A. Skavantzos, "Full adder-based
inner product step processors for residue and quadratic residue
number systems," in Proceedings of the 1993 International
Symposium on Circuits and Systems, (Chicago, IL, May 1993), pp.
1821-1824.
M. Abdallah and A. Skavantzos, "A systematic approach for
selecting practical moduli sets for residue number systems,"
in Proceedings of the 27th IEEE Southeastern Symposium on System
Theory, March 1995, pp. 445-449.
M. Abdallah and A. Skavantzos, "New Multi-Moduli Residue
and Quadratic Residue Systems for Large Dynamic Ranges,"
in Proceedings of the Twenty-Ninth Asilomar Conference on Signals,
Systems and Computers, (Pacific Grove, CA October 1995), pp.
961-965.
M. Abdallah and A. Skavantzos, "Multi Polynomial Channel
Residue Arithmetic for Digital Signal Processing," in Proceedings
of the 10th International Conference on Parallel and Distributed
Computing Systems, (New Orleans, LA, October 1997), pp. 301-307.
A. Skavantzos, "An efficient residue to weighted converter
for a new residue number system," in Proceedings of the 8th
Great Lakes Symposium on VLSI, (Lafayette, LA, Feb 1998), pp.
185-191.
A. Skavantzos and M. Abdallah, "Novel Residue Arithmetic
Processors for High Speed Digital Signal Processing", in
Proceedings of the Thirty Second Asilomar Conference on Signals,
Systems, and Computers, (Pacific Grove, CA, November 1998), pp.
187-193.
A. Skavantzos and T. Stouraitis, "Grouped-Moduli Residue
Number Systems," in Proceedings of the 1999 IEEE International
Symposium on Circuits and Systems, (Orlando, FL, May 1999), pp.
III 478 - III 483.
A. Skavantzos and Y. Wang, "Application of New Chinese Remainder
Theorems to RNS with two Pairs of Conjugate Moduli," in Proceedings
of the 1999 IEEE Pacific Rim Conference on Communications, Computers
and Signal Processing (PACRIM 99).
A. Skavantzos and Y. Wang, "New efficient RNS-to-weighted decoders for conjugate-pair moduli residue number systems," in Proceedings of the Thirty Third Asilomar Conference on Signals, Systems, and Computers, (Pacific Grove, CA 2000).
Y. Jiang, Y. Wang, and A. Skavantzos, "A label search chip with cache-based CAM architecture," in Proceedings of the 44th Midwest Symposium on Circuits and Systems, Dayton Ohio, August 2001.
V. Paliouras, A. Skavantzos, and T. Stouraitis, “Multi-voltage low-power convolvers using the Polynomial Residue Number System,” in Proceedings of 12th IEEE/ACM Great Lakes Symposium on VLSI, (New York), pp. 7-11, April 2002.
V. Paliouras, A. Skavantzos, and T. Stouraitis, “Low-power convolvers using the Polynomial Residue Number System,” in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS’02), (Scottsdale, AZ), pp. II.748-II.751, May 2002.
V. Paliouras, and A. Skavantzos, "Novel forward and inverse PRNS converters of reduced computational complexity," in Proceedings of the 36th Asilomar Conference on Signals, Systems & Computers, (Pacific Grove, CA, November 2002).
D. Schinianakis, A. Kakarountas, T. Stouraitis and A. Skavantzos, “Elliptic Curve Point Multiplication in GF(2n) Using Polynomial Residue Arithmetic”, in Proceedings of the 16th International Conference on Electronics, Circuits and Systems (ICECS 2009), 13-16, Dec. 2009, Hammamet, Tunisia, pp. 980-983.
Skavantzos, M. Abdallah, T. Stouraitis and D. Schinianakis, “Design of a Balanced 8-Modulus RNS”, in Proceedings of the 16th International Conference on Electronics, Circuits and Systems (ICECS, 2009), 13-16 Dec. 2009, Hammamet, Tunisia, pp. 61-64.