The 17th Reconfigurable Architectures Workshop
(RAW 2010) will be held in Atlanta, USA in April 2010. RAW 2010 is associated with the 24th Annual
International Parallel & Distributed Processing Symposium (IPDPS 2010) and
is sponsored by the IEEE Computer Society's Technical Committee on Parallel Processing.
The workshop is one
of the major meetings for researchers and practitioners to present ideas,
results, and on-going research on both theoretical and practical advances in
Reconfigurable Computing.
Reconfigurable computing: architectures,
devices, algorithms, tools and models
As reconfigurable devices have grown in complexity and capabilities over
the years, so has the complexity and variety of applications that must harness
their features with unprecedented effectiveness. The key to effectively harnessing
these features - heterogeneous fabrics, support for partial and run time
reconfiguration (RTR), high speed IO, embedded microprocessors, etc. - includes
research on areas such as algorithms, CAD tools, compilers, operating systems, and
thermal/precision/fault management. Research challenges within these areas are
expected to become even more complex with emerging trends in reconfigurable
computing: 3D integration with other FPGA/memory chips, use of nano-technology
devices as building blocks, operation at sub-threshold voltages for ultra-low
power systems, etc. Furthermore, an appropriate mix of the theoretical
foundations of reconfiguration, and practical considerations, including
architectures, technologies and tools supporting soft/hard, partial/full,
static/run-time reconfiguration is essential to fully reveal and exploit the
possibilities created by this powerful computing paradigm. RAW 2010 aims to
provide a venue to facilitate creative and productive interaction between all
these disciplines.
Authors are invited to submit manuscripts of original
unpublished research in all areas of reconfigurable computing (foundations,
algorithms, hardware architectures, devices, systems-on-chip (SoC),
technologies, software tools, and applications). The topics of interest
include, but are not limited to:
Models
& Architectures ·
Theoretical
Interconnect ·
RTR Models and
Systems ·
RTR Hardware Architectures ·
Optical
Interconnect Models ·
Simulation and Prototyping ·
Bounds and
Complexity Issues ·
3D FPGA Architectures ·
Ultra-low power devices ·
Thermal models ·
Performance prediction models ·
Nano technology based devices and architectures |
Algorithms
& Applications ·
Algorithmic
Techniques ·
Mapping Parallel
Algorithms ·
Distributed Systems
& Networks ·
Fault Tolerance
Issues ·
Reliability Issues ·
Wireless and Mobile
Systems ·
Automotive
Applications ·
Infotainment &
Multimedia ·
Biology Inspired Applications ·
Thermal management ·
Emergent Applications |
Design,
Technologies & Tools ·
Configurable Systems-on-Chip ·
Energy Efficiency
Issues ·
Devices and
Circuits ·
Reconfiguration
Techniques ·
Bitstream
relocation ·
High Level Design
Methods ·
System Support ·
Embedded operating systems ·
Adaptive Runtime Systems ·
Organic Computing ·
CAD tools for 3D FPGAs ·
Languages and Compilation Techniques |
Authors should submit and register their
paper through our web-interface at
http://edas.info/N8195.
All
manuscripts will be reviewed by at least three members of the program
committee. Submissions should be a complete manuscript (not to exceed 8 pages
of single spaced text, including figures and tables) or, in special cases, may
be a summary of relevant work. Submissions should be in pdf-format (preferred),
or alternatively in Postscript (level 2) format. Authors should make sure that
the submission can be viewed using ghostscript and will print on standard
letter size paper (8.5" x 11").
IEEE CS Press
will publish the IPDPS symposium and workshop abstracts as a printed volume.
The complete symposium and workshop proceedings will also be published by IEEE
CS Press as a CD-ROM disk.
Manuscript due:
November 15, 2009
Notification of
acceptance: December
23, 2009
Camera-ready
Papers Due: February
1, 2010
Workshop Co Chairs: Jürgen Becker, Karlsruhe Institute of
Technology - KIT, Germany (becker@kit.edu)
Eli Bozorgzadeh, UC Irvine, USA (eli@ics.uci.edu)
Program Co Chairs: Joćo M. P. Cardoso, University of Porto,
Portugal (jmpc@acm.org)
Aravind Dasu, Utah State
University, USA (dasu@engineering.usu.edu)
Steering Chair: Viktor K. Prasanna,
University of Southern California, USA
(prasanna@usc.edu)
Publicity Chair (USA): Ramachandran Vaidyanathan,
Louisiana State University, USA
(vaidy@ece.lsu.edu)
Publicity Chair (Europe, Asia): Reiner Hartenstein,
Kaiserslautern University of Technology, Germany
Program Committee (not complete):
Ali Akogku, Univ. of Arizona, USA
Hideharu Amano, Keio University, Japan
Jason Anderson, University of Toronto, Canada
David Andrews, The University of Arkansas, USA
Peter
Athanas, Virginia Tech, USA
Sergio
Bampi, Federal University
of Rio Grande do Sul, Brazil
Nader Bagherzadeh, University of California Irvine, USA
Juergen Becker, Karlsruhe Institute of Technology (KIT), Germany
Pascal Benoit, LIRMMM, France
Mladen Berekovic, Technical University Braunschweig, Germany
Neil Bergmann, University of Queensland, Australia
Koen Bertels, TUDelft, The Netherlands
Abbas Bigdeli, National ICT, Australia
Philippe Bonnot, Thales Research & Technology, France
Philip Brisk, University of California, Riverside, USA
Eli Bozorgzadeh, UC Irvine, USA
Thomas Buechner, IBM, Germany
Fabio
Campi, ST Microelectronics,
Italy
Joćo
M. P. Cardoso, University
of Porto, Portugal
Luigi
Carro, Federal University
of Rio Grande do Sul, Brazil
Ricardo
Chaves,
IST-TULisbon/INESC-ID, Portugal
Deming Chen, University of Illinois, USA
Peter Y. K. Cheung, Imperial College London, United Kingdom
Derek Chiou, University of Texas, USA
Katherine Compton, University of Wisconsin-Madison, USA
Rene Cumplido, INAOE, Mexico
Aravind Dasu, Utah State University, USA
Oliver Diessel, University of New South Wales, Australia
Pedro
Diniz, IST-TULisbon/INESC-ID,
Portugal
Adam
Donlin, Xilinx Inc., USA
Hatem
El-Boghdadi, Cairo
University, Egypt
Hossam
Elgindy, University of New
South Wales, Australia
Fabrizio
Ferrandi, Politecnico di
Milano, Italy
Joćo
Canas Ferreira, University
of Porto, Portugal
Alan George, University of Florida, USA
Christian Hochberger, Dresden University of Technology, Germany
Maya Gokhale, Lawrence Livermore National Laboratory, USA
Steven Guccione, Cmpware, Inc., USA
Andreas Herkersdorf, Technical University of Munich, Germany
Thomas Hollstein, Darmstadt University of Technology, Germany
Michael Huebner, Karlsruhe Institute of Technology (KIT), Germany
Alex Jones, University of Pittsburgh, USA
Ryan Kastner, University of California, USA
Srinivas Katkoori, University of South Florida, USA
Andreas Koch, Darmstadt University of Technology, Germany
Rainer Kress, Infineon Technologies, Germany
Rudy Lauwereins, IMEC, Belgium
Miriam Leeser, Northeastern University, USA
Philip Leong, Chinese University of Hong Kong, Hong Kong
Rajit Manohar, Cornell University, USA
Liam Marnane, University College, Cork, Ireland
Eduardo Marques, University
of Sćo Paulo (USP), Brazil
Alba Cristina de Melo, University
of Brazil, Brazil
Seda Memik, Northwestern University, USA
Martin Middendorf, University of Leipzig, Germany
Amar Mukherjee, University of Central Florida, USA
Walid Najjar, University of California, Riverside, USA
Koji Nakano, Hiroshima University, Japan
Jingzhao Ou, Xilinx Inc., The Netherlands
Ranjani Parthasarathi, CEG, Anna University, India
Cameron Patterson, Virginia Tech, USA
Gregory Peterson, The University of Tennessee, USA
Katarina Paulsson, Ericsson, Sweden
Andy Pimentel, University of Amsterdam, The Netherlands
Paula
Pingree, NASA JPL, USA
Thilo Pionteck, University of Luebeck, Germany
Joachim Pistorius, Altera Corp., USA
Marco Platzner, University of Paderborn, Germany
Christian Plessl, University of Paderborn, Germany
Dan Poznanovic, Cray Inc., USA
Viktor Prasanna, University of Southern California, USA
Marco Santambrogio, MIT, USA
Hartmut Schmeck, Karlsruhe Institute of Technology (KIT), Germany
Sakir Sezer, Queen's University Belfast, United Kingdom
Asadollah Shahbahrami, TUDelft, The Netherlands
Kostas Siozios, National Technical University of Athens, Greece
Gerard Smit, University of Twente, The Netherlands
Thilo Streichert, Daimler AG, Germany
Dirk Stroobandt, Ghent University, Belgium
Prasanna Sundararajan, Xilinx Inc., USA
Juergen Teich, Universität Erlangen-Nürnberg, Germany
Russell Tessier, University of Massachusetts, USA
Lionel Torres, LIRMM, Montpellier, France
Jerry Trahan, Louisiana State University, USA
Pedro Trancoso, University of Cyprus, Cyprus
Matthias Traub, Daimler AG, Germany
Jim Torresen, University of Oslo, Norway
Ramachandran Vaidyanathan, Louisiana State University, USA
Carlos
Valderrama, Faculte
Polytechnique de Mons, Belgium
Sridhar
Varadarajan, Satyam
Computer Services Ltd, India
Milan Vasilko, Aeon Experts, United Kingdom
Brian Veale, IBM, USA
Ranga Vemuri, University of Cincinnati, USA
N. Vijaykrishnan, Pennsylvania State University, USA
Martin Vorbach, PACT Informationstechnologie, Germany
Klaus Waldschmidt, University of Frankfurt, Germany
Norbert When, University of Kaiserslautern, Germany
Stephan Wong, TUDelft, The Netherlands