In addition you are invited to take a look at the posters until 6pm.
Chair: TBD
Gregory Dimitroulakos, Michalis Galanis, Costas Goutis
University of Patras, Greece
"A
Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained
Reconfigurable Architectures“
University of Edinburgh, Scotland UK
"Domain-Specific
Reconfigurable Array Targeting Discrete Wavelet Transform for System-on-Chip
Applications"
Maik Boden, Alex Gleich, Steffen Ruelke
Fraunhofer IIS, EAS Dresden, Germany
Ulrich Nageldinger
Infineon Technologies AG Munich, Germany
"A
Low-Cost Realization of an Adaptable Protocol Processing Unit"
G. Chen, M. Kandemir
Pennsylvania State University, USA
S. Tosun, Syracuse University, USA
U. Sezer, Dept. of ECE, University of Wisconsin, Madison, USA
"Reliability-Conscious
Process Scheduling under Performance Constraints in FPGA-Based Embedded Systems"
Christiane Pousa, Luís Góes, Dulcinéia
Penha, Carlos Martins
Pontifical Catholic University of Minas Gerais, Brazil
"Reconfigurable
Sequential Consistency Algorithm"
Lilian Bossuet, Guy Gogniat, Jean-Luc Philippe
Université de Bretagne Sud, France
"Generic
Design Space Exploration for Reconfigurable Architectures"
Fabrizio Ferrandi, Marco Domenico Santambrogio,
Donatella Sciuto,
Politecnico di Milano, Italy
"A
Design Methodology for Dynamic Reconfiguration: The Caronte Architecture."
Kjetil E. Vistnes, Oddvar Soeraasen
Department of Informatics, University of Oslo, Norway
"Reconfigurable
Address Generators for Stream-Based Computation Implemented on FPGAs"
Markus Koester, Mario Porrmann, Ulrich Rückert
Heinz Nixdorf Institute / University of Paderborn, Germany
"Placement-Oriented
Modeling of Partially Reconfigurable Architectures"
João Canas Ferreira, Miguel Magalhães
da Silva
FEUP/DEEC and INESC Porto, Portugal
"Run-time
reconfiguration support for FPGAs with embedded CPUs: The hardware layer"
Kostas Siozios, George Koutroumpezis, Konstantinos Tatas,
Dimitrios Soudris, Antonios Thanailakis
Democritus University of Thrace, Greece
"DAGGER:
A Novel Generic Methodology for FPGA Bitstream Generation and its Software Tool
Implementation"
Dennis Bemmann
Humboldt University Berlin, Germany
"IP
Lookup on a Platform FPGA: a Comparative Study"
Imran Ahmed, Tughrul Arslan
School of Electronics and Engineering. University of Edinburgh, UK
"Domain
Specific Reconfigurable Architecture of Turbo Decoder Optimized for Short Distance
Wireless Communication"
In addition you are invited to take a look at the posters until 6pm.
Chair: TBD
Yasunori Osana, Tomonori Fukushima, Masato Yoshimi,
Yow Iwaoka, Hideharu Amano
Keio University, Japan
Akira Funahashi
Kitano Symbiotic Systems Project, ERATO-SORST, Japan Science and Technology
Agency, Japan
"An
FPGA-Based, Multi-model Simulation Method for Biochemical Systems"
Franjo Plavec, Blair Fort, Zvonko G. Vranesic, Stephen
D. Brown
University of Toronto, Canada
"Experiences
with Soft-Core Processor Design"
Matthew Ouellette, Dylan Buli
Xilinx, Inc., USA
Dan Connors
University of Colorado, Boulder, USA
"Analysis
of Hardware Acceleration in Modern Configurable Embedded Systems"
Evangelos Stefatos, Wei Han, Tughrul Arslan, Robert Thomson
University of Edinburgh, UK
"Low-Power
Reconfigurable VLSI Architecture for the Implementation of FIR Filters"
Yutian Zhao, Ahmet T. Erdogan, Tughrul Arslan
Institute for System Level Integration, University of Edinburgh, UK
"A
Low-Power Dynamic Reconfigurable FFT Processor"
Steven Guccione
Cmpware, Inc., USA
"Programming
Configurable Multiprocessors"
Raymond Peterkin, Dan Ionescu
University of Ottawa, Canada
"Embedded
MPLS Architecture"
Kolin Paul
Indian Institute of Delhi, India
"An
FPGA based Test Bed for Bio Inspired Computation"
Heiko Zimmer, Stefan Zink, Thomas Hollstein, Manfred Glesner
FG Mikroelektr. Systeme, TU Darmstadt, Germany
"Buffer-Architecture
Exploration for Routers in a Hierarchical Network-on-Chip"
Fredy Alexander Rivera Velez, Marcos Sanchez-Elez Martin,
Milagros Fernandez Centeno, Roman Hermida Correa
Depto. Arquitectura de Computadores y Automatica - Universidad Complutense de
Madrid, Spain
Nader Bagherzadeh
Dept. of Electrical and Computing Engineering, University of California, Irvine,
USA
"Low
Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable
Architectures"
E. Syam Sundar, Vikram Chandrasekhar, M. Sashikanth, V. Kamakoti
Veezhinathan
Indian Institute of Technology Madras, India
Vijaykrishnan Narayanan
Pennsylvania State University, USA.
"Online
Detection and Diagnosis of Multiple Configuration Upsets in LUTs of SRAM-based
FPGAs"
Roland Kasper, Thomas Reinemann, Steffen Toscher
IMAT, University Magdeburg, Germany
"Dynamic
Reconfiguration of Mechatronic Real-Time"