Marriot Marina, Fort Lauderdale, Florida, April 15, 2002
8.30 |
Introduction to Reconfigurable Architectures Workshop Gordon Brebner, University of Edinburgh |
Session 1: Algorithms and Architectures |
|
8.40 |
Basic Algorithms for the Asynchronous Reconfigurable Mesh Yosi Ben-Asher & Esti Stein, Haifa University |
9.10 |
On the Communication Capability of the
Self-Reconfigurable Gate Array Architecture Hatem M. El-Boghadi, Ramachandran Vaidyanathan, Jerry L. Trahan & Suresh Rai, Louisiana State University |
9.40 |
Bit-Matrix Decomposition and Dynamic Reconfiguration:
A Unified Arithmetic Processor Architecture, Design and Test Rong Lin, SUNY Geneseo |
10.10 |
Coffee break |
10.30 |
Improving Code Efficiency for Reconfigurable VLIW Processors Steffen Koehler, Jens Braunes, Sergej Sawitzki & Rainer G Spallek, Dresden University of Technology |
Session 2: Tools |
|
11.00 |
High Level Synthesis for Programmable Devices: the HADES Project A.Marongiu, CASPUR, P.Palazzari, ENEA, V.Rosato, Unita di Ricerca |
11.30 |
Multipartite Tables in JBits for the Evaluation of Functions on FPGAs Jeremie Detrey & Florent de Dinechin, Ecole Normale Superieure de Lyon |
12.00 |
JPG - A Partial Bitstream Generation Tool to Support Partial
Reconfiguration in Virtex FPGAs Anup Raghavan, Motorola Australia Software Centre, Peter Sutton, University of Queensland |
12.30 |
Lunch break |
14.00 |
An FPGA Interpreter with Virtual Hardware Management Oliver Diessel & Usama Malik, University of New South Wales |
Session 3: Communications and Cryptography |
|
14.30 | DART: A Dynamically Reconfigurable Architecture dealing with Future Mobile Telecommunications Constraints Raphael David, Daniel Chillet, Sebastien Pillement & Olivier Sentieys, University of Rennes |
15.00 |
Coffee break |
15.30 |
A Run-Time Reconfigurable ATM Switch Edson L. Horta & Sergio T. Kofuji, Escola Politecnica da Universidade de Sao Paulo |
16.00 |
Dynamically Modifiable Ciphers using a Reconfigurable CAST-128 based
Algorithm on ATMEL's FPSLIC Reconfigurable FPGA Architecture Panayotis Nastou, Atmel Hellas, Yannis Stamatiou, University of Patras |
16.30 |
Reconfigurable Implementation of Elliptic Curve Crypto Algorithms M. Bednara, M. Daldrup, J. Teich, J. von zur Gathen & J. Shokrollahi, University of Paderborn |
17.00 | Internet Authentication of LUT-based FPGA Configuration Files Dylan Carline & Paul Coulton, Lancaster University |