/// Notes and examples for LSU EE 4702-1 Spring 2001
/// Rudiments of Behavioral Code
// Behavioral code is used to specify what hardware does rather than
// describe it as an interconnection of simpler components
// (structural code). Behavioral code looks like a program in a
// conventional programming language but there are major differences,
// one difference is in when code starts running. In C execution
// starts with the "main" routine, procedures are executed when they
// are normally called by executing code. In Verilog behavioral
// code is called in a variety of ways, some times in a way similar
// to a procedure call, other times in response to a change in
// a signal.
// Details on behavioral code will be presented later, the rudiments
// are presented here so that behavioral code can be used Verilog
// examples.
/// Code That Starts at t=0
// The code between "initial begin" and "end" starts running at t=0.
module mymod1(myport,alsomyport);
input myport;
output alsomyport;
reg a, b;
// Starts running at t=0.
initial begin
a = 1;
b = myport;
end
endmodule
/// Code That Starts Whenever a Signal Changes
// The code between "always @( a or b) begin" and "end" starts running
// whenever a or b changes.
module mymod2(x,y,z,a,b,c);
input a, b, c;
output x, y, z;
reg x, y, z;
// Runs each time a or b changes.
always @( a or b ) begin
x = 1;
y = 2;
end
endmodule
/// Multiple initial And always Blocks
// A module can have any number of initial and always constructs.
// Timing and other details will be discussed later.
module mymod3(x,y,z,a,b,c);
input a, b, c;
output x, y, z;
reg x, y, z;
// Runs at initialization.
initial begin
x = 1;
end
// Runs at initialization.
initial begin
y = 1;
end
// Runs each time a or b changes.
always @( a or b ) begin
x = x + 1;
end
// Runs each time c changes.
always @( c ) begin
y = 2 * x;
end
endmodule
/// Delay and Printing in a Procedure
// The following are useful in procedures. They are covered briefly
// below and will be covered in detail later.
// The $display system task.
// Used in procedures to print messages in the transcript.
// Similar to the C printf library function.
// $display(FORMAT,ARG1,ARG2,...)
// FORMAT is a string that can contain escape sequences.
// ARG1, ARG2 are the values to be printed.
// Format escape sequences start with a % and followed by a format character.
// Format characters: %d (decimal), %h (hex), %o (octal), %b (binary)
// %c (character), %s(string), %t(time), ...
//
// Examples:
// $display("The values are: i=%d or %h (hex) time=%t\n", i, i, $time);
// This is one of many system tasks.
// Delay Statement
// Used in procedures to stop execution for the specified amount of time.
// This will be covered in greater detail later.
//
// # DELAY;
// Execute the statements below DELAY units after current time.
// (See examples.)
//
// This is one of many constructs that affect simulated time.
module imply(x,a,b);
input a, b;
output x;
wire x = ~a | b;
endmodule // imply
module demo_the_tedious_way();
reg a, b;
wire x;
imply imp1(x, a, b);
initial begin
// Here t = 0 (units discussed later).
a = 0; b = 0;
$display("At the very beginning, t=%t, x= %d\n",$time,x);
// This delays execution for one unit.
#1;
$display("A little later, t=%d, x= %d\n",$time,x);
#1;
a = 0; b = 1;
$display(" t = %t, x = %d\n",$time,x);
#1;
$display(" t = %t, x = %t\n",$time,x);
#1;
a = 1; b = 0;
#1;
$display(" t = %t, x = %d\n",$time,x);
#1;
a = 1; b = 1;
#1;
$display(" t = %t, x = %d\n",$time,x);
$stop;
end
endmodule
module demo_the_better_way();
integer i;
wire a = i[0];
wire b = i[1];
wire x;
imply imp1(x, a, b);
initial begin
for(i=0; i<4; i=i+1) begin
$display("At the beginning of an iteration. t=%t, x=%d.\n", $time,x);
#1;
$display("In the middle of an iteration. t=%t, x=%d.\n", $time,x);
#1;
end
$stop;
end
endmodule