A very quick overview of the electronic tools for engineering literature research provided by the library will be presented followed by a detailed discussion of patent searching.

The Center for Advanced Microstructures and Devices (CAMD) offers some interesting capabilities for microfabrication. This talk provides a background to what these opportunities are and is addressed at a level that undergraduate and graduate students can understand. Both the sub-micron nanometer structure fabrication and the high-aspect ratio microstructures are considered. Some examples of the research work carried out at CAMD are given.

Every year, the IEEE, the Institute of Electrical and Electronic Engineers, sponsors a design oriented student competition. This year's challenge is to build a fire-fighting robot that can search a home, find a fire and extinguish it. The LSU ECE student team is building a mobile robot, with an array of sensors encompassing infrared and sonar distance detectors, infrared marker detection, light sensing flame detection, and an electronic compass module for directional navigation. The presentation will describe the operation and construction of circuits using these sensors and the manner in which we tie all these sensing systems together using various microcontroller/microprocessors. The final product will be an intelligent, real time, embedded system capable of navigating a house looking for, and extinguishing, flames. Progress of the project is reported on.

In this seminar, we present two unified analytical frameworks for evaluating the bit or symbol error probability (SER) of a broad class of coherent, differentially coherent and noncoherent digital communication systems with diversity receivers on generalized fading channels. The exact SER is mostly expressed in terms of a single finite-range integral and in some cases in the form of double finite-range integrals. This offers a convenient method to perform a comprehensive study of all common diversity combining techniques (maximal-ratio combining, equal-gain combining, selection combining and switched combining) with different modulation formats in a myriad of fading scenarios. The unified approach allows previously obtained results to be simplified both analytically and computationally, and new results to be obtained for special cases that heretofore have resisted a simple form.

The advent of micromachining has made it feasible to produce large arrays of small components. Of particular interest are arrays in which the elements are piezoelectric, so that their dimensions can be controlled electronically. Small changes in the dimensions of these elements can be used to locally control the diffraction of light incident on such arrays. This can then be used to produce large, bright displays. Preliminary results, as well as plans for the future, will be discussed.

Computer engineers are suffering in a hell partly of their own creation: while the time needed to access memory has slowly dropped, the number of instructions that can be executed during that time has increased exponentially. Since execution must sometimes wait for the outcome of a memory access, efforts at improving instruction execution speed are increasingly futile. This memory access latency can be partly avoided by caching data in a small, expensive, high-speed memory. Memory latency is still a problem because needed data is not always in the cache. An aggressive solution to the problem is prefetching: bringing data into the cache before it is needed using predictions of memory access addresses. Prefetch schemes reported in the literature predict consecutive or arithmetic address sequences, for example, 1000, 1025, 1050, 1075, etc. A more flexible scheme is described here: a neighborhood is found for memory access instructions based on their past behavior. Address predictions are made using a neighborhood, these can form sequential or stride sequences, but can also form irregular sequences, increasing the number of useful prefetches and reducing the number of useless ones. This neighborhood prefetching was evaluated by execution-driven simulation of shared-memory parallel computers (multiprocessors) running SPLASH 2 benchmark programs. Performance improvements of up to 25\% were obtained on neighborhood prefetching schemes having storage requirements of only 7\% that of the cache itself.

Multivariable/multivariate systems theory has successfully made its way into industrial practice in the form of large software packages supported by service companies with design and support expertise. Examples are model based predictive control systems and multivariate statistical analysis packages. But the industrial market supports virtually no vendor-supplied real-time multivariable process monitoring and control products.

Multivariable systems theory is a child of vector-space mathematics. In this seminar, Dr. Moore will argue that with respect to fitness for survival in industrial applications, multivariable theory suffers defects inherited from vector-space mathematics.

He will furthermore argue that we have the means to create a technical foundation for industrially fit multivariable products by repairing these inherited defects.

Present cellular systems have mainly been designed to allow mobile users to interface to fixed telephone networks, and hence, have primarily been optimized for voice transmission. Future wireless systems, however, will be required to support non-voice sources with a variety of rates and quality-of-service requirements, which differ significantly from voice sources in their properties. Consequently, attempts to accommodate such sources in current wireless systems, which have been designed from a voice-centric point of view, could lead to mismatch problems and inefficiencies.

In this talk, we take CDMA (Code Division Multiple Access) to be the wireless multiple access mechanism, and propose to modify it so as to exploit some of the properties of non-voice sources to achieve throughput gains. The simplest case, namely, the uplink (mobile to base station link) of a CDMA system with two user classes is considered. One of the classes, emulating voice, consists of delay intolerant users requiring support for a constant information bit rate. The other class, emulating non-voice sources, consists of delay tolerant users needing support for an information bit rate larger than a specified value. Certain synchronization requirements, inherent to the CDMA system, are imposed on users of both classes. The objective is to maximize the throughput of the delay tolerant users. Starting from the constraints defining a conventional CDMA system, we propose a modification wherein the transmissions of the delay tolerant users are scheduled, so that only a limited number of them are transmitting information at any given time instant. It is shown that the proposed transmission scheme provides throughput gains as compared to conventional CDMA under many conditions. These conditions are identified in terms of the various system parameters. It is also shown that the proposed transmission scheme imposes the same or lesser average transmit power requirements, and identical peak power requirements, as compared to conventional CDMA.

Extensions of the basic scheme to include further constraints on the inter-cell interference are presented. A general result that follows is that given a set of delay tolerant users with certain (average and peak) power constraints, and certain inter-cell interference constraints, the per-user throughput may be maximized by time-scheduling a certain subset of the users.

The behavior of the scheme in the presence of system imperfections, such as imperfect power control, and implementation issues and strategies, given knowledge of certain system parameters, are also indicated.

The jet engine stall problem poses a challenge for the next generation of aeroengines. Feedback control becomes the technological choice for stall suppression, and performance improvement of jet engines. In this presentation we will introduce the stall problem and existing solutions, as well as opportunities for our jet engine control program in the ECE Department.

Dynamical modeling signal and systems is often based on the traditional integer order derivative/integrator-operators. Studies show that for some systems fractional order equivalents give a more efficient description. The presentation starts with a brief introduction to fractional calculus and some of its applications in physics and engineering. Further discussions will include properties of impulse responses from models based on generalized derivative operators. Results show that both frequency and envelope changes are functions of the derivative order and can thus be useful in function approximations. A sub-optimal parameter estimator for such a model is also presented.

The reconfigurable mesh (R-Mesh) has drawn much interest in recent years, due in part to its ability to admit extremely fast algorithms for a large number of problems. For these algorithms to be useful in practice, the R-Mesh must be "scalable;" that is, any algorithm designed for a large R-Mesh should be able to run on a smaller R-Mesh without significant loss of efficiency. A "scaling simulation" performs the adaptation of a given algorithm to a smaller R-Mesh.

This seminar will describe the basic features of reconfigurable bus architectures, like the general R-Mesh and some other restricted variations. It will also present some novel scaling simulations for these models.

A new method for economical, low thermal-budget, fabrication of embedded insulator structures and quantum dots in single crystalline Si layers will be presented. The method also provides epitaxial metallization and high p-type doping in a single processing step. The method is based on solid-metal mediated molecular beam epitaxy (SMM-MBE), a new phenomenon in which a semiconductor material grows at a buried semiconductor/metal interface during thermal evaporation of the semiconductor.

The SMM-MBE method will be described in details together with some of its applications in nanoscale device fabrication. The method provides an economical solution to some of the challenges facing current ULSI technology. Specifically, the observation is made in the aluminum silicon system in which surface reconstruction induced epitaxy defines the relationship between the underlying Si (111) and the overlayer A1 (111) metal. In contrast with previous observations in both solid-phase epitaxy (SPE) and liquid-metal mediated epitaxy, the epitaxial growth is spontaneous, defect free, and planar. Initial experiments on growing epitaxial Si layers with buried aluminum oxide dots were successful with no measurable defects in the Si SMM-MBE layer. Pellets of aluminum oxide with lateral dimension as large as 14nm were buried in the SMM-MBE layer at the original Al/Si interface. These initial results demonstrate the possibility of growing predefined embedded insulator structures in the Si matrix.

Extensive experimental investigation has been carried out to study the hot carrier life time improvement due to deuterium annealing of MOS transistors with one level and multi-levels of metalization. 10-80 times improvement has been demonstrated in both one level and multi-levels of metalization. The demonstration of large life time improvement of transistors with multi-levels of metalization leads to the development of using deuterium annealing in the manufacture of integrated circuits at Lucent Technologies.

The classical concept suggests that degradation of MOS transistors is caused by interface trap generation resulting from "hot carrier injection". In order to understand the mechanism of interface trap generation, the MOS transistors have been subjected to various carrier injections into the oxide such as anode hole injection and substrate hot electron injection. These experiments show clearly that hot carrier injection into the gate oxide exhibits essentially no isotope effect, whereas, channel hot electrons at the interface exhibit a large isotope effect. This leads to the conclusion that channel hot electrons, not carriers injected into the gate oxide, are primarily responsible for interface trap generation for standard hot carrier stressing. In addition, a simple model has been proposed to explain the saturation of the transconductance degradation.

Hand analysis of linear circuits quickly becomes cumbersome with complexity. This is especially true with circuits having feedback. As a consequence, the process of analog circuit design can become one of iteration on a circuit simulator. Such a process, while effective in "testing" variations, does not "teach" circuit properties well. In this seminar, a new approach to circuit analysis is presented that is useful in circuit property exploration and in circuit development. Using superposition and Driving Point Impedance, a signal flow graph is developed directly from the circuit topology. Graphical algebra is performed to obtain the desired transfer relations. The methodology of Driving Point Impedance/Signal Flow Graph (DPI/SFG) is shown to be a systematic, direct approach to analyzing circuits. This methodology is particularly useful in working with feedback circuits where all loading effects are directly and completely included in the analysis.

The seminar will present the methodology and apply it to some interesting problems: simple feedback circuits, finding the impedance of a cascode transistor pair, analyzing the diff amp stage without the use of half cell approximations, and finding the time constants for a clocked latch circuit operating in the linear region.