Fall 2010        EE 7785: Parallelizing Compilers
M W 5:00-6:30                            Professor: J. (Ram) Ramanujam

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Course material (handouts, ...)


Course Information:

 Instructor: J. (Ram) Ramanujam, 345 EE Bldg., 578-5628 (jxr at ece.lsu.edu)
 Time, Place: M W 5:00- 6:30 in room 149 EE Building
 Office Hours: M W: 11:30-2:00
 Text: None; Papers and class notes
 Reference: High Performance Compilers for Parallel Computing, M. Wolfe, 1996
  Optimizing Compilers for Modern Architectures, R. Allen and K. Kennedy, 2002
 Prerequisites:   Graduate standing
 Goals: To familiarize the student with techniques used in optimizing compilers for a variety
of architectures, including high-performance architectures

Catalog Data:

7785 Parallelizing Compilers (3)  Prerequisites: Graduate standing.
Analysis and optimization of programs for a variety of architectures;
impact on architectural design.

Description:

The course deals with principles and practice of compiler optimizations,
in particular source-to-source transformations. Programming paradigms,
compiler support and their relation to high-performance architectures
will be discussed. The issues of dependence analysis, program transformations,
data locality, scheduling, synchronization and communication will be covered
in the context of a variety of machine architectures.

Course Outline:

  1. Review of high-performance computing:
    • architectural taxonomy, modern processor architectures
    • synchronization, latency, partitioning
  2. Program Analysis:
    • dependence analysis; value-based dependence
    • dependence problem formulations; dependence test hierarchy and engineering
    • integer programming based dependence tests
    • polyhedral models for dependence analysis
    • runtime dependence testing, hybrid analysis
  3. Program Transformations:
    • standard scalar transformations
    • loop distribution, vectorization
    • parallelization
    • loop fusion
    • reductions
    • array privitization
    • loop interchange, skewing, reversal, wavefront transformation
    • unimodular and non-unimodular transformations
    • systolic transformations
    • program transformations for data locality and memory hierarchy
    • iteration space tiling
    • unified frameworks for transformations
    • polyhedral models for transformations
    • analysis and optimization of non-array codes
    • compiling for different parallel architectures
    • code generation and optimization for explicitly managed memory hierarchies
    • compilation for accelerators: FPGAs, Cell-like architectures, GPUs
    • compilation for irregular (index-array based) accesses
    • impact of transformations on architectural design
  4. Additional Topics (will be covered if we have time):
    • control flow graph, dominators, interval analysis, dataflow analysis
    • program dependence graph, single assignment form
    • inter-procedural analysis and optimizations

Grading : TWO tests (20% each), a final (30%), term-paper, projects and class presentation (30%).


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