EE 7700-1             
Fall 2003             
Call No.: 1842
Compiler Optimizations
| Professor: | J. (Ram) Ramanujam, 345 EE Bldg., 578-5628    Email: |
| Office Hours: | MWF 8:30 - 9:40; MWF 11:30 - 12:00 |
| Time: | 10:40 - 11:30 MWF, 149 EE |
| Reference: |
Class notes and recent papers from the literature |
| Prerequisites:   | Graduate standing |
The course deals with principles and practice of compiler
optimizations. The interaction between architectures and the
choice of compiler optimizations will be discussed. The issues
of data dependence and flow analysis, and program
transformations for a variety of objectives for a wide range of
processor architectures (single processor systems, shared- and
distributed-memory parallel processors, special-purpose
processors, etc.) will be covered. Transformations that enhance
data locality and optimize memory usage will get a lot of
coverage. In addition, compilation starting from high-level
specifications will be a key focus.
- Review:
    processor architectures; latency, locality, synchronization
- Techniques for Dependence Detection:
- dependence analysis: integer-programming based tests, value-based tests
- control flow graph, dominators, interval analysis, dataflow analysis
- program dependence graph (PDG) and static single assignment (SSA) form
- interprocedural analysis
- Program Restructuring:
- scalar transformations; vectorization; parallelization
- unimodular transformations: loop interchange, skewing, wavefront
- loop fusion and distribution
- non-unimodular transformations
- iteration space tiling
- communication optimizations
- transformations for data locality: registers, caches, I/O
- exploiting instruction-level parallelism
- storage related optimizations; memory usage minimization
- arithmetic optimizations; high-level specification
- transformations for special-purpose processors
- Homework/Programs/Project and Presentation 30%
- Two tests 40%
- Final 30% Dec. 9, 2003