EE 7700-1              Fall 2001              Call No.: 1735
Software Optimizations and High-Level Synthesis

Description

The course deals with four aspects:

1. high-level compiler optimizations and behavioral transformations;
2. software optimizations aimed at reducing power consumption;
3. synthesis and optimization of large scale digital systems primarily from high-level specification, with coverage of topics such as custom logic synthesis, design space exploration, optimizing for low power, and system-level hardware/software co-design; and
4. memory optimization and synthesis.

The design automation, architecture and compiler issues in system-on-chip (SOC) design will also be discussed. Configurable computing including FPGAs and system-level (hardware and software) design issues will also be discussed. This course covers topics in an important emerging area in digital design.

Course Topics:  A large subset of these will be covered

• Introduction: digital synthesis, application-specific ICs.

• Brief look at hardware description languages (VHDL, Verilog).

• high-level compiler optimizations.

• behavioral transformations.

• high-level synthesis of hardware: algorithms for clock selection, scheduling, module selection and binding.

• system-level synthesis: hardware-software co-design.

• system-on-chip design: memory synthesis, design space exploration.

• design and optimization for low power applications.

• configurable computing: architectures, software, FPGAs.

Grading:

• Homework and Programs 20%

• Project and Presentation 25%

• One test 25%

• Final 30%