HPCA-18 (2012) Program

MACAU: A Markov Model for Reliability Evaluations of Caches Under Single-bit and Multi-bit Upsets
Jinho Suh (Dept of Electrical Engineering, University of Southern California), Murali Annavaram (Dept of Electrical Engineering, University of Southern California), Michel Dubois (Dept of Electrical Engineering, University of Southern California)

Efficient Scrub Mechanisms for Error-Prone Emerging Memories
Manu Awasthi (University of Utah), Manjunath Shevgoor (University of Utah), Kshitij Sudan (University of Utah), Bipin Rajendran (IBM Research), Rajeev Balasubramonian (University of Utah), Viji Srinivasan (IBM Research)

Booster: Reactive Core Acceleration for Mitigating the Effects of Process Variation and Application Imbalance in Low-Voltage Chips
Timothy N. Miller (The Ohio State University), Xiang Pan (The Ohio State University), Renji Thomas (The Ohio State University), Naser Sedaghati (The Ohio State University), Radu Teodorescu (The Ohio State University)

Staged Reads: Mitigating the Impact of DRAM Writes on DRAM Reads
Niladrish Chatterjee (University of Utah), Naveen Muralimanohar (Hewlett Packard), Rajeev Balasubramonian (University of Utah), Al Davis (University of Utah), Norman P. Jouppi (Hewlett Packard)

Balancing DRAM locality and parallelism in shared memory CMP systems
Min Kyu Jeong (The University of Texas at Austin),  Doe Hyun Yoon (Hewlett-Packard Laboratories), Dam Sunwoo (ARM Inc.), Mike Sullivan (The University of Texas at Austin), Ikhwan Lee (The University of Texas at Austin), Mattan Erez (The University of Texas at Austin)

MORSE: Multi-Objective Reconfigurable SElf-Optimizing Memory Scheduler
Janani Mukundan (Cornell University), José F. Martínez (Cornell University)

TAP: A TLP-Aware Cache Management Policy for a CPU-GPU Heterogeneous Architecture
Jaekyu Lee (Georgia Institute of Technology), Hyesoon Kim (Georgia Institute of Technology)

CPU-Assisted GPGPU on Fused CPU-GPU Architectures
Yi Yang (North Carolina State University), Ping Xiang (North Carolina State University), Mike Mantor (Advanced Micro Devices), Huiyang Zhou (North Carolina State University)

Design, Integration and Implementation of the DySER Hardware Accelerator into OpenSPARC
Jesse Benson (University of Wisconsin, Madison),  Ryan Cofell (University of Wisconsin, Madison), Chris Frericks (University of Wisconsin, Madison), Chen-Han Ho (University of Wisconsin, Madison), Venkatraman Govindaraju (University of Wisconsin, Madison), Tony Nowatzki (University of Wisconsin, Madison), Karthikeyan Sankaralingam (University of Wisconsin, Madison)

SCD: A Scalable Coherence Directory with Flexible Sharer Set Encoding
Daniel Sanchez (Stanford University), Christos Kozyrakis (Stanford University)

Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory
Anurag Negi (Chalmers University of Technology, Sweden), Ruben Titos-Gil (Universidad de Murcia, Spain, Manuel E. Acacio (Universidad de Murcia, Spain), Jose M. Garcia (Universidad de Murcia, Spain) Per Stenstrom (Chalmers University of Technology, Sweden)

BulkSMT: Designing SMT Processors for Atomic-Block Execution
Xuehai Qian (University of Illinois, Urbana-Champaign), Benjamin Sahelices (University of Valladolid), Josep Torrellas (University of Illinois, Urbana-Champaign)

Supporting Efficient Collective Communication in NoCs

Sheng Ma (National University of Defense Technology, University of Toronto), Natalie Enright Jerger (University of Toronto), Zhiying Wang (National University of Defense Technology)

Quasi-Nonvolatile SSD: Trading Flash Memory Nonvolatility to Improve Storage System Performance for Enterprise Applications
Yangyang Pan (Rensselaer Polytechnic Institute), Guiqiang Dong (Rensselaer Polytechnic Institute), Qi Wu (Rensselaer Polytechnic Institute), Tong Zhang (Rensselaer Polytechnic Institute)

System-level Implications of Disaggregated Memory
Kevin Lim (HP Labs), Yoshio Turner (HP Labs), Jose Renato Santos (HP Labs), Alvin AuYoung (HP Labs), Jichuan Chang (HP Labs), Parthasarathy Ranganathan (HP Labs), Thomas F. Wenisch (University of Michigan)

Improving Write Operations in MLC Phase Change Memory
Lei Jiang (University of Pittsburgh), Bo Zhao (University of Pittsburgh), Youtao Zhang (University of Pittsburgh), Jun Yang (University of Pittsburgh), Bruce R. Childers (University of Pittsburgh)

Adaptive Set-Granular Cooperative Caching
Dyer Rolan (Universidade da Coruna), Basilio B. Fraguela (Universidade da Coruna), Ramon Doallo (Universidade da Coruna)

Cache Restoration for Highly Partitioned Virtualized Systems
David Daly (IBM Research), Harold W. Cain (IBM Research)

Decoupled Dynamic Cache Segmentation
Samira M. Khan (The University of Texas at San Antonio), Zhe Wang (The University of Texas at San Antonio), Daniel A. Jimenez (The University of Texas at San Antonio)

Computational Sprinting  (Best paper award winner)
Arun Raghavan (University of Pennsylvania), Yixin Luo (University of Michigan), Anuj Chandawalla (University of Michigan), Marios Papaefthymiou (University of Michigan), Kevin P. Pipe (University of Michigan), Thomas F. Wenisch (University of Michigan), Milo M. K. Martin (University of Pennsylvania)

Power Balanced Pipelines
John Sartori (University of Illinois, Urbana-Champaign), Ben Ahrens (University of Illinois, Urbana-Champaign), Rakesh Kumar (University of Illinois, Urbana-Champaign)

Flexible Register Management using Reference Counting
Steven Battle (Drexel University), Andrew Hilton (IBM), Mark Hempstead (Drexel University), Amir Roth (University of Pennsylvania)

AgileRegulator: A Hybrid Voltage Regulator Scheme Redeeming DarkSilicon for Power Efficiency in a Multicore Architecture
Guihai Yan (Institute of Computing Technology, Chinese Academy of Sciences), Yingmin Li (Qualcomm), Yinhe Han (Institute of Computing Technology, Chinese Academy of Sciences), Xiaowei Li (Institute of Computing Technology, Chinese Academy of Sciences), Minyi Guo (Shanghai Jiao Tong University), Xiaoyao Liang (Shanghai Jiao Tong University)

JETC: Joint Energy Thermal and Cooling Management for Memory and CPU Subsystems in Servers
Raid Ayoub (University of California, San Diego), Rajib Nath (University of California, San Diego), Tajana Simunic Rosing (University of California, San Diego)

Cooperative Partitioning: Energy-Efficient Cache Partitioning for High-Performance CMPs
Karthik T. Sundararajan (The University of Edinburgh), Vasileios Porpodas (The University of Edinburgh), Timothy M. Jones (The University of Cambridge), Nigel P. Topham (The University of Edinburgh), Bjorn Franke (The University of Edinburgh)

Dynamically Heterogeneous Cores Through 3D Resource Pooling
Houman Homayoun (University of California, San Diego), Vasileios Kontorinis (University of California, San Diego), Amirali Shayan (University of California, San Diego), Ta-Wei Lin (University of California, San Diego), Dean Tullsen (University of California, San Diego)

Architectural Support for Synchronization-Free Deterministic Parallel Programming
Cedomir Segulja (University of Toronto), Tarek Abdelrahman (University of Toronto)

Pacman: Tolerating Asymmetric Data Races with Unintrusive Hardware
Shanxiang Qi (University of Illinois at Urbana-Champaign), Norimasa Otsuki (Renesas Electronics Corp.), Lois Orosa Nogueira (Universidad de Santiago de Compostela), Abdullah Muzahid (University of Illinois at Urbana-Champaign), Josep Torrellas (University of Illinois at Urbana-Champaign)

BulkCompactor: Optimized Deterministic Execution via Conflict-Aware Commit of Atomic Blocks
Yuelu Duan (Department of Computer Science, University of Illinois at Urbana-Champaign), Xing Zhou (Department of Computer Science, University of Illinois at Urbana-Champaign), Wonsun Ahn (Department of Computer Science, University of Illinois at Urbana-Champaign), Josep Torrellas (Department of Computer Science, University of Illinois at Urbana-Champaign)

Parabix: Boosting the Efficiency of Text Processing on Commodity Processors
Dan Lin (Simon Fraser University), Nigel Medforth (Simon Fraser University), Kenneth S. Herdy (Simon Fraser University), Arrvindh Shriraman (Simon Fraser University), Rob Cameron (Simon Fraser University)

WEST: Cloning Data Cache Behavior using Stochastic Traces
Ganesh Balakrishnan (North Carolina State University and IBM), Yan Solihin (North Carolina State University)

Statistical Performance Comparisons of Computers
Tianshi Chen (Institute of Computing Technology, Chinese Academy of Sciences), Yunji Chen (Institute of Computing Technology, Chinese Academy of Sciences), Qi Guo (Institute of Computing Technology, Chinese Academy of Sciences), Olivier Temam (National Institute for Research in Computer and Control Sciences (INRIA), Saclay), Yue Wu (Institute of Computing Technology, Chinese Academy of Sciences), Weiwu Hu (Institute of Computing Technology, Chinese Academy of Sciences)

Heterogeneity in “Homogeneous” Warehouse-Scale Computers: A Performance Opportunity (CSDL | Xplore)
Jason Mars (University of Virginia), Lingjia Tang (University of Virginia), Robert Hundt (Google)

A Dependable Cache Coherence Multicore Architecture (CSDL | Xplore)
Omer Khan (MIT, University of Massachusetts, Lowell), Mieszko Lis (MIT), Yildiz Sinangil (MIT), Srinivas Devadas (MIT)

Network Congestion Avoidance Through Speculative Reservation
Nan Jiang (Stanford University), Daniel U. Becker (Stanford University), George Michelogiannakis (Stanford University), William J. Dally (NVIDIA and Stanford University)

Network within a Network Approach to Create a Scalable High-Radix Router Microarchitecture
Jung Ho Ahn (Seoul National University), Sungwoo Choo (Seoul National University), John Kim (KAIST)

Whole Packet Forwarding: Efficient Design of Fully Adaptive Routing Algorithms for Networks-on-Chip
Sheng Ma (National University of Defense Technology and University of Toronto), Natalie Enright Jerger (University of Toronto), Zhiying Wang (National University of Defense Technology)