Long-Latency Operations (Topics)
Initiation interval and latency
Placement in pipeline
Timing diagrams
Problems Introduced by Long-Latency Operations
E.g., in DLX second of two consecutive FP divides must stall ...
... because of hazard.
Register-Write Structural Hazards
(MEM can normally accommodate only one instruction.)
RAW Hazards
WAW hazards
Precise Exceptions
... and so write results ...
... out of order.
Handling Functional Unit Structural Hazards
... by duplicating or fully pipelining functional units.
Otherwise, instructions must be stalled ...
... not unlike RAW hazards due to load instructions.
Handling Register Write Structural Hazards
Each cycle the reservation register is shifted right.
A 1 indicates a "reservation" to enter MEM.
Bit position indicates time ...
... with the LSB indicating two cycles later ...
... the next bit indicating three cycles later ...
... and so on.
The ID stage controller, based on the opcode of the instr., ...
... knows the number of cycles before MEM will be entered.
It checks the corresponding reservation register bit ...
... if it's 1 then IF and ID are stalled ...
... if it's 0 then the bit is set to 1 and the instruction proceeds.
If such a stall occurs ...
... the reservation register is still shifted ...
... and so a 0 will eventually move into the bit position.
Method 2: Delay instructions ready to enter MEM
... indicating when it has an instruction ...
... that is ready to enter MEM.
One of those signals is chosen (using some method) ...
... the corresponding instruction moves to MEM ...
... while the others are stalled.
Comparison of Method 1 and 2
... since logic remains in one stage.
In contrast, logic for method 2 would span several stages ...
... since stages back to IF might need to be stalled ...
... and so critical paths would be long.
Method 2 is more flexible ...
... since priority could be given to longer-latency instructions.
Handling RAW Hazards
... must keep track of registers with pending writes ...
... and use this information to stall instructions.
Handling WAW Hazards
... will also handle those WAW hazards ...
... in which there is an intervening write.
If there is no intervening write ...
... the earlier instruction is nulled.
Precise Exceptions
... so some registers must be unwritten ...
... so that when handler starts ...
... it must seem as though ...
... all instructions before faulting instructions executed ...
... while no instructions after faulting instruction execute.
To do this either ...
... add lots of stalls so instructions do finish in order ...
... or need to unexecute instructions.
The first option is fine for debugging, too slow otherwise.
The second option requires lots of hardware.
Unexecuting Instructions
... by restoring the previous contents of any register it wrote.
Method 1: History File
These are used to undo writes.
Method 2: Buffer writes to register file.
... are first placed in a buffer ...
... possibly out of program order.
Writes from buffer to register file performed in order ...
... waiting for long-latency operations to complete.
Register reads check the buffer first, then the register file.
When an exception occurs ...
... only writes preceding the faulting instruction ...
... are made from the buffer to the register file.
Disadvantage: Checking both buffer and register file is time-consuming.
Method 3: Future File
Future file written as instruction complete ...
... main file written in program order.
Future file is used for reading registers.
At an exception, ...
... main file updated up to faulting instruction ...
... future file is effectively erased ...
... its contents replaced by main register file before handler starts.
Other Precise Exception Methods
There are other ways of providing precise exceptions.
Method 1: Non-excepting versions of floating-point instructions.
Method 2: Stall just long enough to ensure precise exceptions.
Functional units can be designed so that ...
... if there will be an exception ...
... it will happen early. (E.g., check for zero divisor.)
With such functional units ...
... it can be determined that instructions are committed ...
... soon after they enter the functional unit.
In this method, stall instructions ...
... until all preceding instructions are committed.
| David M. Koppelman - koppel@ee.lsu.edu | Modified 21 Mar 1997 12:33 (18:33 UTC) |