////////////////////////////////////////////////////////////////////////////////
///
/// Template for LSU EE 3755 Fall 2001 Homework 1
///

 /// Name:


 /// Instructions:
  //
  // Copy this to a file named hw01.v to directory ~/hw in your
  // class account. (~ is your home directory.)  Use this
  // file for your solution.  Your entire solution should be in
  // this file.
  //
  // Do not rename the modules in this file and be sure to use the
  // directory and filename given above.

  // Assignment: http://www.ee.lsu.edu/ee3755/2001f/hw01.pdf

////////////////////////////////////////////////////////////////////////////////


////////////////////////////////////////////////////////////////////////////////
/// Problem 1
///

module hello();

   initial begin
      $display("Hello, world!");
   end

endmodule


////////////////////////////////////////////////////////////////////////////////
/// Problem 2
///

module eq_slice_es(eo,a,b,ei);
   input a, b, ei;
   output eo;

   // Solution goes here.  Delete this comment.

endmodule


////////////////////////////////////////////////////////////////////////////////
/// Problem 3
///

module eq_slice(eo,a,b,ei);
   input a, b, ei;
   output eo;

   // Solution goes here.  Delete this comment.


endmodule


////////////////////////////////////////////////////////////////////////////////
/// Problem 4
///

module equal(eq,a,b);
   input [3:0] a, b;
   output      eq;

   // Solution goes here.  Delete this comment.

endmodule


////////////////////////////////////////////////////////////////////////////////
/// Test Bench
///

// Do not remove comment below.
// exemplar translate-off

module test();

   reg abit, bbit, ei;
   wire eoe, eoi, eq;
   reg [3:0] a, b;

   eq_slice_es ees(eoe,abit,bbit,ei);
   eq_slice eis(eoi,abit,bbit,ei);
   equal eqaul1(eq,a,b);

   integer   i, es_probs, ei_probs, eq_probs;
   reg       shadow_eo, shadow_eq;

   initial 
     begin
        es_probs = 0;
        ei_probs = 0;
        eq_probs = 0;

        for(i=0; i<8; i=i+1) 
          begin

             {abit,bbit,ei} = i[2:0];
             shadow_eo = ( abit == bbit ) && ei;

             #1;

             if( shadow_eo !== eoe ) 
               begin
                  if( !es_probs ) 
                    $display("Problem with eq_slice_es at a = %d, b = %d, ei = %d",
                             abit, bbit, ei);
                  es_probs = es_probs + 1;
               end

             if( shadow_eo !== eoi ) 
               begin
                  if( !ei_probs ) 
                    $display("Problem with eq_slice at a = %d, b = %d, ei = %d",
                             abit, bbit, ei);
                  ei_probs = ei_probs + 1;
               end
          end
        
        for(i=0; i<256; i=i+1) 
          begin

             {a,b} = i[7:0];
             shadow_eq = a == b;

             #1; 

             if( shadow_eq !== eq ) 
               begin
                  if( !eq_probs ) 
                    $display("Problem with equal at a = %d, b = %d", a, b);
                  eq_probs = eq_probs + 1;
               end
             
          end
        
        $display("Done with tests.");
        if( eq_probs + es_probs + ei_probs == 0 ) $display("No problems found.");
     end
   
endmodule